[PATCH v2 2/3] drm/xe/xe2_hpg: Add set of workarounds

Bhadane, Dnyaneshwar dnyaneshwar.bhadane at intel.com
Thu Jun 5 18:03:16 UTC 2025



> -----Original Message-----
> From: Roper, Matthew D <matthew.d.roper at intel.com>
> Sent: Thursday, June 5, 2025 12:24 AM
> To: Bhadane, Dnyaneshwar <dnyaneshwar.bhadane at intel.com>
> Cc: intel-xe at lists.freedesktop.org; Chauhan, Shekhar
> <shekhar.chauhan at intel.com>
> Subject: Re: [PATCH v2 2/3] drm/xe/xe2_hpg: Add set of workarounds
> 
> On Wed, Jun 04, 2025 at 08:22:35PM +0530, Dnyaneshwar Bhadane wrote:
> > From: Shekhar Chauhan <shekhar.chauhan at intel.com>
> >
> > Add set of workarounds for xe2_hpg.
> >
> > -v2: Fix xe2_hpg GMD version for some workarounds.
> >
> > Signed-off-by: Shekhar Chauhan <shekhar.chauhan at intel.com>
> > Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane at intel.com>
> > ---
> >  drivers/gpu/drm/xe/xe_wa.c         | 55 +++++++++++++++++++++---------
> >  drivers/gpu/drm/xe/xe_wa_oob.rules |  4 +--
> >  2 files changed, 40 insertions(+), 19 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> > index 67196baa4249..2c0e0adc5904 100644
> > --- a/drivers/gpu/drm/xe/xe_wa.c
> > +++ b/drivers/gpu/drm/xe/xe_wa.c
> > @@ -489,8 +489,8 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> >  	  XE_RTP_RULES(GRAPHICS_VERSION(2004),
> FUNC(xe_rtp_match_first_render_or_compute)),
> >  	  XE_RTP_ACTIONS(SET(ROW_CHICKEN3,
> XE2_EUPEND_CHK_FLUSH_DIS))
> >  	},
> > -	{ XE_RTP_NAME("18034896535, 16021540221"), /* 16021540221:
> GRAPHICS_STEP(A0, B0) */
> > -	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2004),
> > +	{ XE_RTP_NAME("16021540221"),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION(2004), GRAPHICS_STEP(A0, B0),
> 
> Breaking out 20.01/20.02 into a separate entry farther down is good since it
> keeps the LPG and HPG handling separate, and also avoids blindly applying this
> 20.03 which doesn't exist today, but could potentially show up in the future.
> 
> However is there actually a benefit to splitting 16021540221 (a-step
> only) and 18034896535 (all steppings) into separate entries given that the two
> workarounds have the same actions?  I think breaking it out like this will
> actually cause a warning if run on an A-step platform since we'll have two
> entries trying to update the same bits of the same register (see
> compatible_entries() in xe_reg_sr.c).

Understood, merging it single one and avoiding the duplication on writing the same bit again. Thanks. 

> 
> >  		       FUNC(xe_rtp_match_first_render_or_compute)),
> >  	  XE_RTP_ACTIONS(SET(ROW_CHICKEN4, DISABLE_TDL_PUSH))
> >  	},
> > @@ -507,6 +507,10 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> >  	  XE_RTP_RULES(GRAPHICS_VERSION(2004),
> FUNC(xe_rtp_match_first_render_or_compute)),
> >  	  XE_RTP_ACTIONS(SET(ROW_CHICKEN, EARLY_EOT_DIS))
> >  	},
> > +	{ XE_RTP_NAME("18034896535"),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION(2004),
> FUNC(xe_rtp_match_first_render_or_compute)),
> > +	  XE_RTP_ACTIONS(SET(ROW_CHICKEN4, DISABLE_TDL_PUSH))
> > +	},
> >  	/*
> >  	 * These two workarounds are the same, just applying to different
> >  	 * engines.  Although Wa_18032095049 (for the RCS) isn't required on
> > @@ -533,31 +537,38 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> >  	/* Xe2_HPG */
> >
> >  	{ XE_RTP_NAME("16018712365"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001),
> FUNC(xe_rtp_match_first_render_or_compute)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> > +		       FUNC(xe_rtp_match_first_render_or_compute)),
> >  	  XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW,
> XE2_ALLOC_DPA_STARVE_FIX_DIS))
> >  	},
> >  	{ XE_RTP_NAME("16018737384"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001),
> FUNC(xe_rtp_match_first_render_or_compute)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001,
> XE_RTP_END_VERSION_UNDEFINED),
> > +		       FUNC(xe_rtp_match_first_render_or_compute)),
> >  	  XE_RTP_ACTIONS(SET(ROW_CHICKEN, EARLY_EOT_DIS))
> >  	},
> 
> Since this one is now a "from now on" special case, we also need to remove the
> other copy of this workaround farther down in the Xe2_LPG section.  Otherwise
> we'll wind up with two entries trying to apply the same workaround on 20.04
> which will cause a warning (it looks like CI saw this too).
> 
> 
> Matt
> 
> >  	{ XE_RTP_NAME("14019988906"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001),
> FUNC(xe_rtp_match_first_render_or_compute)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> > +		       FUNC(xe_rtp_match_first_render_or_compute)),
> >  	  XE_RTP_ACTIONS(SET(XEHP_PSS_CHICKEN, FLSH_IGNORES_PSD))
> >  	},
> >  	{ XE_RTP_NAME("14019877138"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001),
> FUNC(xe_rtp_match_first_render_or_compute)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> > +		       FUNC(xe_rtp_match_first_render_or_compute)),
> >  	  XE_RTP_ACTIONS(SET(XEHP_PSS_CHICKEN, FD_END_COLLECT))
> >  	},
> >  	{ XE_RTP_NAME("14020338487"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001),
> FUNC(xe_rtp_match_first_render_or_compute)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> > +		       FUNC(xe_rtp_match_first_render_or_compute)),
> >  	  XE_RTP_ACTIONS(SET(ROW_CHICKEN3,
> XE2_EUPEND_CHK_FLUSH_DIS))
> >  	},
> >  	{ XE_RTP_NAME("18032247524"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001),
> FUNC(xe_rtp_match_first_render_or_compute)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> > +		       FUNC(xe_rtp_match_first_render_or_compute)),
> >  	  XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0,
> SEQUENTIAL_ACCESS_UPGRADE_DISABLE))
> >  	},
> >  	{ XE_RTP_NAME("14018471104"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001),
> FUNC(xe_rtp_match_first_render_or_compute)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> > +		       FUNC(xe_rtp_match_first_render_or_compute)),
> >  	  XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0_UDW,
> ENABLE_SMP_LD_RENDER_SURFACE_CONTROL))
> >  	},
> >  	/*
> > @@ -566,7 +577,7 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> >  	 * apply this to all engines for simplicity.
> >  	 */
> >  	{ XE_RTP_NAME("16021639441"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002)),
> >  	  XE_RTP_ACTIONS(SET(CSFE_CHICKEN1(0),
> >  			     GHWSP_CSB_REPORT_DIS |
> >  			     PPHWSP_CSB_AND_TIMESTAMP_REPORT_DIS,
> > @@ -578,13 +589,19 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> >  	  XE_RTP_ACTIONS(SET(LSC_CHICKEN_BIT_0, WR_REQ_CHAINING_DIS))
> >  	},
> >  	{ XE_RTP_NAME("14021402888"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> > +ENGINE_CLASS(RENDER)),
> >  	  XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7,
> CLEAR_OPTIMIZATION_DISABLE))
> >  	},
> > -	{ XE_RTP_NAME("14021821874"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001),
> FUNC(xe_rtp_match_first_render_or_compute)),
> > +	{ XE_RTP_NAME("14021821874, 14022954250"),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> > +		       FUNC(xe_rtp_match_first_render_or_compute)),
> >  	  XE_RTP_ACTIONS(SET(TDL_TSL_CHICKEN, STK_ID_RESTRICT))
> >  	},
> > +	{ XE_RTP_NAME("18034896535"),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> > +		       FUNC(xe_rtp_match_first_render_or_compute)),
> > +	  XE_RTP_ACTIONS(SET(ROW_CHICKEN4, DISABLE_TDL_PUSH))
> > +	},
> >
> >  	/* Xe2_LPM */
> >
> > @@ -774,7 +791,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
> >  	  XE_RTP_ACTIONS(SET(INSTPM(RENDER_RING_BASE),
> ENABLE_SEMAPHORE_POLL_BIT))
> >  	},
> >  	{ XE_RTP_NAME("18033852989"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2004),
> ENGINE_CLASS(RENDER)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)),
> >  	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1,
> DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
> >  	},
> >  	{ XE_RTP_NAME("14021567978"),
> > @@ -807,7 +824,7 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
> >  	  XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1,
> DIS_SF_ROUND_NEAREST_EVEN))
> >  	},
> >  	{ XE_RTP_NAME("14019386621"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> > +ENGINE_CLASS(RENDER)),
> >  	  XE_RTP_ACTIONS(SET(VF_SCRATCHPAD,
> XE2_VFG_TED_CREDIT_INTERFACE_DISABLE))
> >  	},
> >  	{ XE_RTP_NAME("14020756599"),
> > @@ -824,13 +841,17 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
> >  			     DIS_AUTOSTRIP))
> >  	},
> >  	{ XE_RTP_NAME("15016589081"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> > +ENGINE_CLASS(RENDER)),
> >  	  XE_RTP_ACTIONS(SET(CHICKEN_RASTER_1,
> DIS_CLIP_NEGATIVE_BOUNDING_BOX))
> >  	},
> >  	{ XE_RTP_NAME("22021007897"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(2001, 2002),
> > +ENGINE_CLASS(RENDER)),
> >  	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4,
> SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
> >  	},
> > +	{ XE_RTP_NAME("18033852989"),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION(2001), ENGINE_CLASS(RENDER)),
> > +	  XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN1,
> DISABLE_BOTTOM_CLIP_RECTANGLE_TEST))
> > +	},
> >
> >  	/* Xe3_LPG */
> >  	{ XE_RTP_NAME("14021490052"),
> > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules
> > b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > index 9efc5accd43d..425cb401c276 100644
> > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > @@ -30,10 +30,10 @@
> >  		GRAPHICS_VERSION(2004)
> >  13011645652	GRAPHICS_VERSION(2004)
> >  		GRAPHICS_VERSION(3001)
> > -14022293748	GRAPHICS_VERSION(2001)
> > +14022293748	GRAPHICS_VERSION_RANGE(2001, 2002)
> >  		GRAPHICS_VERSION(2004)
> >  		GRAPHICS_VERSION_RANGE(3000, 3001)
> > -22019794406	GRAPHICS_VERSION(2001)
> > +22019794406	GRAPHICS_VERSION_RANGE(2001, 2002)
> >  		GRAPHICS_VERSION(2004)
> >  		GRAPHICS_VERSION_RANGE(3000, 3001)
> >  22019338487	MEDIA_VERSION(2000)
> > --
> > 2.34.1
> >
> >
> 
> --
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation


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