[v4,04/11] drm/xe/vrsr: Introduce flag has_vrsr

[Poosa, Karthik]

On 29-05-2025 16:46, Badal Nilawar wrote:
> Introduce flag has_vrsr to determine if platform supports VRSR feature
>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Signed-off-by: Badal Nilawar <badal.nilawar at intel.com>
> ---
>   drivers/gpu/drm/xe/xe_device_types.h | 2 ++
>   drivers/gpu/drm/xe/xe_pci.c          | 3 +++
>   2 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index f81be293b260..e2749ed2a61f 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -334,6 +334,8 @@ struct xe_device {
>   		u8 has_sriov:1;
>   		/** @info.has_usm: Device has unified shared memory support */
>   		u8 has_usm:1;
> +		/** @info.has_vrsr: Has capability to enter into VRAM self refresh */
> +		u8 has_vrsr:1;
>   		/** @info.has_64bit_timestamp: Device supports 64-bit timestamps */
>   		u8 has_64bit_timestamp:1;
>   		/** @info.is_dgfx: is discrete device */
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index 024175cfe61e..46a99d6ef1a5 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -68,6 +68,7 @@ struct xe_device_desc {
>   	u8 has_llc:1;
>   	u8 has_pxp:1;
>   	u8 has_sriov:1;
> +	u8 has_vrsr:1;
>   	u8 needs_scratch:1;
>   	u8 skip_guc_pc:1;
>   	u8 skip_mtcfg:1;
> @@ -342,6 +343,7 @@ static const struct xe_device_desc bmg_desc = {
>   	.dma_mask_size = 46,
>   	.has_display = true,
>   	.has_fan_control = true,
> +	.has_vrsr = true,
>   	.has_heci_cscfi = 1,
>   	.needs_scratch = true,
>   };
> @@ -589,6 +591,7 @@ static int xe_info_init_early(struct xe_device *xe,
>   	xe->info.has_llc = desc->has_llc;
>   	xe->info.has_pxp = desc->has_pxp;
>   	xe->info.has_sriov = desc->has_sriov;
> +	xe->info.has_vrsr = desc->has_vrsr;
>   	xe->info.skip_guc_pc = desc->skip_guc_pc;
>   	xe->info.skip_mtcfg = desc->skip_mtcfg;
>   	xe->info.skip_pcode = desc->skip_pcode;

LGTM.

Reviewed-by: Karthik Poosa <karthik.poosa at intel.com>