[PATCH 3/3] drm/xe/topology: Stop trying to fix programming mistakes

[Matt Roper]

On Wed, Jun 04, 2025 at 10:29:08PM +0200, Michal Wajdeczko wrote:
> We shouldn't ever pass more DSS registers than our hardcoded limit,
> it should be sufficient to just assert that instead of trying to
> fix it, as this will never happen in the production driver.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/xe/xe_gt_topology.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_gt_topology.c b/drivers/gpu/drm/xe/xe_gt_topology.c
> index 048743913b36..305939c69747 100644
> --- a/drivers/gpu/drm/xe/xe_gt_topology.c
> +++ b/drivers/gpu/drm/xe/xe_gt_topology.c
> @@ -22,8 +22,7 @@ static void load_dss_mask(struct xe_gt *gt, xe_dss_mask_t mask, int numregs,
>  	u32 fuse_val[XE_MAX_DSS_FUSE_REGS] = {};
>  	int i;
>  
> -	if (drm_WARN_ON(&gt_to_xe(gt)->drm, numregs > XE_MAX_DSS_FUSE_REGS))
> -		numregs = XE_MAX_DSS_FUSE_REGS;
> +	xe_gt_assert(gt, numregs <= ARRAY_SIZE(fuse_val));
>  
>  	for (i = 0; i < numregs; i++)
>  		fuse_val[i] = xe_mmio_read32(&gt->mmio, regs[i]);
> -- 
> 2.47.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation