[PATCH v4 00/21] drm/i915/flipq: Rough flip queue implementation
Ville Syrjala
ville.syrjala at linux.intel.com
Mon Jun 9 14:10:25 UTC 2025
From: Ville Syrjälä <ville.syrjala at linux.intel.com>
Initial stab at implementing the PIPEDMC based flip queue.
Briefly smoke tested on LNL, not much more.
Still has quite a few warts..
v2: cleaned up a few of the warts at least
should work on PTL now
v3: Rebase due to DSB GOSUB stuff getting merged
Try to fix PKG_C_LATENCY
Ignore INT_VECTOR when opther PIPEDMC interrupt are present
v4: Fix up some DSB issues
Limit DMC clock gating w/as
Reload pipe C/D PIPEDMC MMIOs on PTL
Disable PSR in order to get a bit more CI coverage
Ville Syrjälä (21):
drm/i915/dsb: Use intel_dsb_ins_align() in intel_dsb_align_tail()
drm/i915/dsb: Provide intel_dsb_head() and intel_dsb_size()
drm/i915/dsb: Introduce intel_dsb_exec_time_us()
drm/i915/dsb: Garbage collect the MMIO DEwake stuff
drm/i915/dsb: Move the DSB_PMCTRL* reset out of intel_dsb_finish()
drm/i915/dsb: Disable the GOSUB interrupt
drm/i915/dmc: Limit PIPEDMC clock gating w/a to just ADL/DG2/MTL
drm/i915/dmc: Parametrize MTL_PIPEDMC_GATING_DIS
drm/i915: Set PKG_C_LATENCY.added_wake_time to 0
drm/i915: Try to program PKG_C_LATENCY more correctly
drm/i915/dmc: Shuffle code around
drm/i915/dmc: Reload PIPEDMC MMIO registers for pipe C/D on PTL+
drm/i915/dmc: Assert DMC is loaded harder
drm/i915/dmc: Define flip queue related PIPEDMC registers
drm/i915/flipq: Provide the nuts and bolts code for flip queue
drm/i915/flipq: Implement flip queue based commit path
drm/i915/flipq: Implement Wa_18034343758
drm/i915/flipq: Implement Wa_16018781658 for LNL-A0
drm/i915/flipq: Add intel_flipq_dump()
drm/i915/flipq: Enable flipq by default for testing
drm/i915/flipq: Disable PSR for extra flip queue coverage
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_display.c | 57 ++-
.../gpu/drm/i915/display/intel_display_core.h | 6 +
.../drm/i915/display/intel_display_driver.c | 3 +
.../drm/i915/display/intel_display_params.c | 3 +
.../drm/i915/display/intel_display_params.h | 3 +-
.../i915/display/intel_display_power_well.c | 4 +-
.../drm/i915/display/intel_display_types.h | 20 +
drivers/gpu/drm/i915/display/intel_dmc.c | 319 ++++++++----
drivers/gpu/drm/i915/display/intel_dmc.h | 13 +-
drivers/gpu/drm/i915/display/intel_dmc_regs.h | 192 ++++++-
drivers/gpu/drm/i915/display/intel_dsb.c | 120 ++---
drivers/gpu/drm/i915/display/intel_dsb.h | 6 +-
drivers/gpu/drm/i915/display/intel_flipq.c | 473 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_flipq.h | 37 ++
drivers/gpu/drm/i915/display/skl_watermark.c | 108 ++--
drivers/gpu/drm/i915/i915_reg.h | 3 +-
drivers/gpu/drm/xe/Makefile | 1 +
18 files changed, 1141 insertions(+), 228 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_flipq.c
create mode 100644 drivers/gpu/drm/i915/display/intel_flipq.h
--
2.49.0
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