[PATCH 2/4] drm/xe: Promote struct xe_mmio definition to own file

[Matt Roper]

On Tue, Jun 03, 2025 at 10:28:24PM +0200, Michal Wajdeczko wrote:
> We already have separate .c and .h files for xe_mmio functions,
> time to introduce _types.h to follow what other components do.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Lucas De Marchi <lucas.demarchi at intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
>  drivers/gpu/drm/xe/xe_device_types.h | 40 +--------------------
>  drivers/gpu/drm/xe/xe_mmio.h         |  3 +-
>  drivers/gpu/drm/xe/xe_mmio_types.h   | 53 ++++++++++++++++++++++++++++
>  3 files changed, 56 insertions(+), 40 deletions(-)
>  create mode 100644 drivers/gpu/drm/xe/xe_mmio_types.h
> 
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index b93c04466637..831dd88a4c52 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -17,6 +17,7 @@
>  #include "xe_heci_gsc.h"
>  #include "xe_lmtt_types.h"
>  #include "xe_memirq_types.h"
> +#include "xe_mmio_types.h"
>  #include "xe_oa_types.h"
>  #include "xe_platform_types.h"
>  #include "xe_pmu_types.h"
> @@ -121,45 +122,6 @@ struct xe_vram_region {
>  #endif
>  };
>  
> -/**
> - * struct xe_mmio - register mmio structure
> - *
> - * Represents an MMIO region that the CPU may use to access registers.  A
> - * region may share its IO map with other regions (e.g., all GTs within a
> - * tile share the same map with their parent tile, but represent different
> - * subregions of the overall IO space).
> - */
> -struct xe_mmio {
> -	/** @tile: Backpointer to tile, used for tracing */
> -	struct xe_tile *tile;
> -
> -	/** @regs: Map used to access registers. */
> -	void __iomem *regs;
> -
> -	/**
> -	 * @sriov_vf_gt: Backpointer to GT.
> -	 *
> -	 * This pointer is only set for GT MMIO regions and only when running
> -	 * as an SRIOV VF structure
> -	 */
> -	struct xe_gt *sriov_vf_gt;
> -
> -	/**
> -	 * @regs_size: Length of the register region within the map.
> -	 *
> -	 * The size of the iomap set in *regs is generally larger than the
> -	 * register mmio space since it includes unused regions and/or
> -	 * non-register regions such as the GGTT PTEs.
> -	 */
> -	size_t regs_size;
> -
> -	/** @adj_limit: adjust MMIO address if address is below this value */
> -	u32 adj_limit;
> -
> -	/** @adj_offset: offset to add to MMIO address when adjusting */
> -	u32 adj_offset;
> -};
> -
>  /**
>   * struct xe_tile - hardware tile structure
>   *
> diff --git a/drivers/gpu/drm/xe/xe_mmio.h b/drivers/gpu/drm/xe/xe_mmio.h
> index 540bade24790..4e794757b020 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.h
> +++ b/drivers/gpu/drm/xe/xe_mmio.h
> @@ -6,9 +6,10 @@
>  #ifndef _XE_MMIO_H_
>  #define _XE_MMIO_H_
>  
> -#include "xe_gt_types.h"
> +#include "xe_mmio_types.h"
>  
>  struct xe_device;
> +struct xe_mmio_range;
>  struct xe_reg;
>  
>  int xe_mmio_probe_early(struct xe_device *xe);
> diff --git a/drivers/gpu/drm/xe/xe_mmio_types.h b/drivers/gpu/drm/xe/xe_mmio_types.h
> new file mode 100644
> index 000000000000..67c535dd1248
> --- /dev/null
> +++ b/drivers/gpu/drm/xe/xe_mmio_types.h
> @@ -0,0 +1,53 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2022-2025 Intel Corporation
> + */
> +
> +#ifndef _XE_MMIO_TYPES_H_
> +#define _XE_MMIO_TYPES_H_
> +
> +#include <linux/types.h>
> +
> +struct xe_gt;
> +struct xe_tile;
> +
> +/**
> + * struct xe_mmio - register mmio structure
> + *
> + * Represents an MMIO region that the CPU may use to access registers.  A
> + * region may share its IO map with other regions (e.g., all GTs within a
> + * tile share the same map with their parent tile, but represent different
> + * subregions of the overall IO space).
> + */
> +struct xe_mmio {
> +	/** @tile: Backpointer to tile, used for tracing */
> +	struct xe_tile *tile;
> +
> +	/** @regs: Map used to access registers. */
> +	void __iomem *regs;
> +
> +	/**
> +	 * @sriov_vf_gt: Backpointer to GT.
> +	 *
> +	 * This pointer is only set for GT MMIO regions and only when running
> +	 * as an SRIOV VF structure
> +	 */
> +	struct xe_gt *sriov_vf_gt;
> +
> +	/**
> +	 * @regs_size: Length of the register region within the map.
> +	 *
> +	 * The size of the iomap set in *regs is generally larger than the
> +	 * register mmio space since it includes unused regions and/or
> +	 * non-register regions such as the GGTT PTEs.
> +	 */
> +	size_t regs_size;
> +
> +	/** @adj_limit: adjust MMIO address if address is below this value */
> +	u32 adj_limit;
> +
> +	/** @adj_offset: offset to add to MMIO address when adjusting */
> +	u32 adj_offset;
> +};
> +
> +#endif
> -- 
> 2.47.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation