✓ CI.checkpatch: success for Add kernel param to limit the eDP rate to HBR2

[Patchwork]

== Series Details ==

Series: Add kernel param to limit the eDP rate to HBR2
URL   : https://patchwork.freedesktop.org/series/150031/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
202708c00696422fd217223bb679a353a5936e23
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit aceed4f4a969dd9ad9d907aa56d1959b255d2dea
Author: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
Date:   Tue Jun 10 15:34:49 2025 +0530

    drm/i915/dp: Add kernel param to limit eDP rate to HBR2"
    
    Some ICL/TGL platforms with combo PHY ports can theoretically support HBR3,
    but in practice, signal integrity issues may prevent stable operation.
    While some systems include a Parade PS8461 mux chip to mitigate jitter and
    enable HBR3, there is no reliable way to detect its presence.
    Additionally, many systems have broken or missing VBT entries, making it
    unsafe to rely on VBT for link rate limits.
    
    To address this, introduce a new kernel parameter `limit_edp_hbr2`.
    When set, this parameter forces the eDP link rate to be capped at
    HBR2 (540000 kHz), overriding any higher advertised rates from the sink or
    DPCD. By default, the higher rates will be allowed, i.e. the parameter
    will be set to false.
    
    This provides a manual override for users and OEMs to limit the rate to
    HBR2, where output with HBR3 is unstable.
    
    Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
+ /mt/dim checkpatch 52ecbb6a68785860c776b29f58792d9807243979 drm-intel
0b495f0b0920 Revert "drm/i915/dp: Reject HBR3 when sink doesn't support TPS4"
aceed4f4a969 drm/i915/dp: Add kernel param to limit eDP rate to HBR2"