✗ CI.checkpatch: warning for drm/i915/display: make all global state opaque

[Patchwork]

== Series Details ==

Series: drm/i915/display: make all global state opaque
URL   : https://patchwork.freedesktop.org/series/150157/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
202708c00696422fd217223bb679a353a5936e23
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 0ec5aba21280d173fd611f1f3571b832ca82097e
Author: Jani Nikula <jani.nikula at intel.com>
Date:   Thu Jun 12 15:12:11 2025 +0300

    drm/i915/cdclk: make struct intel_cdclk_state opaque
    
    With all the code touching struct intel_cdclk_state moved inside
    intel_cdclk.c, we move the struct definition there too, and make the
    type opaque. This nicely reduces includes from intel_cdclk.h.
    
    Signed-off-by: Jani Nikula <jani.nikula at intel.com>
+ /mt/dim checkpatch a338c75e43f1604b70e9b2f8d287bb1b5d7ca934 drm-intel
ec9ddf123579 drm/i915/wm: abstract intel_dbuf_pmdemand_needs_update()
-:63: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'state' - possible side-effects?
#63: FILE: drivers/gpu/drm/i915/display/skl_watermark.c:44:
+#define intel_atomic_get_old_dbuf_state(state) \
+	to_intel_dbuf_state(intel_atomic_get_old_global_obj_state(state, &to_intel_display(state)->dbuf.obj))

-:64: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#64: FILE: drivers/gpu/drm/i915/display/skl_watermark.c:45:
+	to_intel_dbuf_state(intel_atomic_get_old_global_obj_state(state, &to_intel_display(state)->dbuf.obj))

-:65: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'state' - possible side-effects?
#65: FILE: drivers/gpu/drm/i915/display/skl_watermark.c:46:
+#define intel_atomic_get_new_dbuf_state(state) \
+	to_intel_dbuf_state(intel_atomic_get_new_global_obj_state(state, &to_intel_display(state)->dbuf.obj))

-:66: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#66: FILE: drivers/gpu/drm/i915/display/skl_watermark.c:47:
+	to_intel_dbuf_state(intel_atomic_get_new_global_obj_state(state, &to_intel_display(state)->dbuf.obj))

total: 0 errors, 2 warnings, 2 checks, 94 lines checked
d01566e344e3 drm/i915/wm: add more accessors to dbuf state
-:28: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#28: FILE: drivers/gpu/drm/i915/display/intel_pmdemand.c:366:
+			min_t(u8, intel_dbuf_num_active_pipes(new_dbuf_state), INTEL_NUM_PIPES(display));

total: 0 errors, 1 warnings, 0 checks, 40 lines checked
5b546b7ddd65 drm/i915/wm: make struct intel_dbuf_state opaque type
b66ac648b412 drm/i915/bw: abstract intel_bw_pmdemand_needs_update()
e11f9bc27b3f drm/i915/bw: relocate intel_can_enable_sagv() and rename to intel_bw_can_enable_sagv()
ed40e4caf95a drm/i915: move icl_sagv_{pre, post}_plane_update() to intel_bw.c
382c385cb881 drm/i915/bw: abstract intel_bw_qgv_point_peakbw()
a2a197842c96 drm/i915/bw: make struct intel_bw_state opaque
70affc178a2b drm/i915/cdclk: abstract intel_cdclk_logical()
4bc78f94980f drm/i915/cdclk: abstract intel_cdclk_min_cdclk()
8625ae8ad0e2 drm/i915/cdclk: abstract intel_cdclk_bw_min_cdclk()
066010611645 drm/i915/cdclk: abstract intel_cdclk_pmdemand_needs_update()
5f179f789c38 drm/i915/cdclk: abstract intel_cdclk_force_min_cdclk()
13206b7101de drm/i915/cdclk: abstract intel_cdclk_read_hw()
21688a79b280 drm/i915/cdclk: abstract intel_cdclk_actual() and intel_cdclk_actual_voltage_level()
0ec5aba21280 drm/i915/cdclk: make struct intel_cdclk_state opaque