[PATCH 2/5] drm/xe: Track maximum GTs per tile on a per-platform basis

[Lucas De Marchi]

On Thu, Jun 12, 2025 at 05:14:41PM -0700, Matt Roper wrote:
>Today all of our platforms fall into one of three cases:
> * Single tile platforms with a single (primary) GT
> * Single tile platforms with two GTs (primary + media)
> * Two-tile platforms with a single GT (primary) in each
>
>Our numbering of GTs has been a bit inconsistent between platforms
>(e.g., GT1 is the media GT on some platforms, but the second tile's
>primary GT on others).  In the future we'll likely have platforms that
>are both multi-tile and multi-GT, which will make the situation more
>confusing.  We could also wind up with more than just two types of GTs
>at some point in the future.
>
>Going forward we should standardize the way we assign uapi GT IDs to
>internal GT structures.  Let's declare that for userspace GT ID n,
>
>  GT[n]'s tile             = n / (max gt per tile)
>  GT[n]'s slot within tile = n % (max gt per tile)
>
>We don't want the GT numbering to change for any of our current
>platforms since the current IDs are part of our ABI contract with
>userspace so this means we should track the 'max gt per tile' value on a
>per-platform basis rather than just using a single value across the
>driver.  Encode this into device descriptors in xe_pci.c and use the
>per-platform number for various checks in the code.  Constant
>XE_MAX_GT_PER_TILE will remain just as the maximum across all platforms
>for easy of sizing array allocations.
>
>Signed-off-by: Matt Roper <matthew.d.roper at intel.com>


Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>

Lucas De Marchi