[PATCH 1/2] drm/xe/pat: Determine ATS / PTA programming during early sw init

[Upadhyay, Tejas]

> -----Original Message-----
> From: Roper, Matthew D <matthew.d.roper at intel.com>
> Sent: 14 June 2025 03:18
> To: intel-xe at lists.freedesktop.org
> Cc: Upadhyay, Tejas <tejas.upadhyay at intel.com>; Roper, Matthew D
> <matthew.d.roper at intel.com>
> Subject: [PATCH 1/2] drm/xe/pat: Determine ATS / PTA programming during
> early sw init
> 
> Decide whether programming of the special ATS and PTA PAT entries is
> necessary (and which entries should be programmed) during early software
> initialization rather than hardcoding this into the 'program' functions.
> Future platforms may want to re-use the same functions but utilize different
> special entry values.  Consolidating all of the decisions into one place keeps
> things simple.
> 
> Signed-off-by: Matt Roper <matthew.d.roper at intel.com>
> ---
>  drivers/gpu/drm/xe/xe_device_types.h |  4 ++++
>  drivers/gpu/drm/xe/xe_pat.c          | 21 +++++++++++++++------
>  2 files changed, 19 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h
> b/drivers/gpu/drm/xe/xe_device_types.h
> index ac27389ccb8b..003afb279a5e 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -499,6 +499,10 @@ struct xe_device {
>  		const struct xe_pat_table_entry *table;
>  		/** @pat.n_entries: Number of PAT entries */
>  		int n_entries;
> +		/** @pat.ats_entry: PAT entry for PCIe ATS responses */
> +		const struct xe_pat_table_entry *pat_ats;
> +		/** @pat.pta_entry: PAT entry for page table accesses */
> +		const struct xe_pat_table_entry *pat_pta;
>  		u32 idx[__XE_CACHE_LEVEL_COUNT];
>  	} pat;
> 
> diff --git a/drivers/gpu/drm/xe/xe_pat.c b/drivers/gpu/drm/xe/xe_pat.c index
> 38a6a49c1b2a..31663ead7822 100644
> --- a/drivers/gpu/drm/xe/xe_pat.c
> +++ b/drivers/gpu/drm/xe/xe_pat.c
> @@ -307,21 +307,27 @@ static const struct xe_pat_ops xelpg_pat_ops = {
> static void xe2lpg_program_pat(struct xe_gt *gt, const struct
> xe_pat_table_entry table[],
>  			       int n_entries)
>  {
> +	struct xe_device *xe = gt_to_xe(gt);
> +
>  	program_pat_mcr(gt, table, n_entries);
> -	xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS),
> xe2_pat_ats.value);
> 
> -	if (IS_DGFX(gt_to_xe(gt)))
> -		xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA),
> xe2_pat_pta.value);
> +	if (xe->pat.pat_ats)
> +		xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_ATS), xe-
> >pat.pat_ats->value);
> +	if (xe->pat.pat_pta)
> +		xe_gt_mcr_multicast_write(gt, XE_REG_MCR(_PAT_PTA),
> +xe->pat.pat_pta->value);
>  }
> 
>  static void xe2lpm_program_pat(struct xe_gt *gt, const struct
> xe_pat_table_entry table[],
>  			       int n_entries)
>  {
> +	struct xe_device *xe = gt_to_xe(gt);
> +
>  	program_pat(gt, table, n_entries);
> -	xe_mmio_write32(&gt->mmio, XE_REG(_PAT_ATS),
> xe2_pat_ats.value);
> 
> -	if (IS_DGFX(gt_to_xe(gt)))
> -		xe_mmio_write32(&gt->mmio, XE_REG(_PAT_PTA),
> xe2_pat_pta.value);
> +	if (xe->pat.pat_ats)
> +		xe_mmio_write32(&gt->mmio, XE_REG(_PAT_ATS), xe-
> >pat.pat_ats->value);
> +	if (xe->pat.pat_pta)
> +		xe_mmio_write32(&gt->mmio, XE_REG(_PAT_PTA), xe-
> >pat.pat_pta->value);
>  }
> 
>  static void xe2_dump(struct xe_gt *gt, struct drm_printer *p) @@ -386,6
> +392,9 @@ void xe_pat_init_early(struct xe_device *xe)
>  	if (GRAPHICS_VER(xe) == 30 || GRAPHICS_VER(xe) == 20) {
>  		xe->pat.ops = &xe2_pat_ops;
>  		xe->pat.table = xe2_pat_table;
> +		xe->pat.pat_ats = &xe2_pat_ats;
> +		if (IS_DGFX(xe))
> +			xe->pat.pat_pta = &xe2_pat_pta;

LGTM,
Reviewed-by: Tejas Upadhyay <tejas.upadhyay at intel.com>

Tejas
> 
>  		/* Wa_16023588340. XXX: Should use XE_WA */
>  		if (GRAPHICS_VERx100(xe) == 2001)
> --
> 2.49.0