✗ CI.checkpatch: warning for drm/i915/display: make all global state opaque (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/display: make all global state opaque (rev2)
URL   : https://patchwork.freedesktop.org/series/150157/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
f8ff75ae1d2127635239b134695774ed4045d05b
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 03470e8c7ece10eeaeec77d95bf2529d4d878040
Author: Jani Nikula <jani.nikula at intel.com>
Date:   Wed Jun 25 13:32:34 2025 +0300

    drm/i915/cdclk: make struct intel_cdclk_state opaque
    
    With all the code touching struct intel_cdclk_state moved inside
    intel_cdclk.c, we move the struct definition there too, and make the
    type opaque. This nicely reduces includes from intel_cdclk.h.
    
    Reviewed-by: Imre Deak <imre.deak at intel.com>
    Signed-off-by: Jani Nikula <jani.nikula at intel.com>
+ /mt/dim checkpatch e4196e8184ee5a9c70c136f659dccef786c263b3 drm-intel
0039319189b4 drm/i915/wm: abstract intel_dbuf_pmdemand_needs_update()
-:64: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'state' - possible side-effects?
#64: FILE: drivers/gpu/drm/i915/display/skl_watermark.c:45:
+#define intel_atomic_get_old_dbuf_state(state) \
+	to_intel_dbuf_state(intel_atomic_get_old_global_obj_state(state, &to_intel_display(state)->dbuf.obj))

-:65: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#65: FILE: drivers/gpu/drm/i915/display/skl_watermark.c:46:
+	to_intel_dbuf_state(intel_atomic_get_old_global_obj_state(state, &to_intel_display(state)->dbuf.obj))

-:66: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'state' - possible side-effects?
#66: FILE: drivers/gpu/drm/i915/display/skl_watermark.c:47:
+#define intel_atomic_get_new_dbuf_state(state) \
+	to_intel_dbuf_state(intel_atomic_get_new_global_obj_state(state, &to_intel_display(state)->dbuf.obj))

-:67: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#67: FILE: drivers/gpu/drm/i915/display/skl_watermark.c:48:
+	to_intel_dbuf_state(intel_atomic_get_new_global_obj_state(state, &to_intel_display(state)->dbuf.obj))

total: 0 errors, 2 warnings, 2 checks, 94 lines checked
cf99f9955488 drm/i915/wm: add more accessors to dbuf state
-:29: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#29: FILE: drivers/gpu/drm/i915/display/intel_pmdemand.c:366:
+			min_t(u8, intel_dbuf_num_active_pipes(new_dbuf_state), INTEL_NUM_PIPES(display));

total: 0 errors, 1 warnings, 0 checks, 40 lines checked
7c151bf53e16 drm/i915/wm: make struct intel_dbuf_state opaque type
ce8b5d2c32f8 drm/i915/bw: abstract intel_bw_pmdemand_needs_update()
eae7144cbf1d drm/i915/bw: relocate intel_can_enable_sagv() and rename to intel_bw_can_enable_sagv()
4d9c2f4c5934 drm/i915: move icl_sagv_{pre, post}_plane_update() to intel_bw.c
3d0e5a83bb3b drm/i915/bw: abstract intel_bw_qgv_point_peakbw()
e32ed708fb64 drm/i915/bw: make struct intel_bw_state opaque
f81cfbc4a25b drm/i915/cdclk: abstract intel_cdclk_logical()
ae21fbc18dd6 drm/i915/cdclk: abstract intel_cdclk_min_cdclk()
41eee6fbfe50 drm/i915/cdclk: abstract intel_cdclk_bw_min_cdclk()
f409597f69ba drm/i915/cdclk: abstract intel_cdclk_pmdemand_needs_update()
efec290d819f drm/i915/cdclk: abstract intel_cdclk_force_min_cdclk()
216c5784b41d drm/i915/cdclk: abstract intel_cdclk_read_hw()
5aa60c5a12aa drm/i915/cdclk: abstract intel_cdclk_actual() and intel_cdclk_actual_voltage_level()
03470e8c7ece drm/i915/cdclk: make struct intel_cdclk_state opaque