[PATCH v4 04/11] drm/xe: Make it possible to read instance0 MCR registers after xe_gt_mcr_init_early
Lucas De Marchi
lucas.demarchi at intel.com
Wed Jun 25 19:07:52 UTC 2025
On Thu, Jun 19, 2025 at 12:49:03PM +0200, Maarten Lankhorst wrote:
>After mcr_init_early, we need to be able to do VRAM and CCS probing
>without hwconfig probe. Fortunately the relevant registers are all
>instance 0, which fortunately means no dependencies on further initialization
>is required.
>
>Reviewed-by: Matt Roper <matthew.d.roper at intel.com>
>[mlankhorst: Fix british spelling]
^ not sure what you mean here, but should probably be gone from commit
message.
>Signed-off-by: Maarten Lankhorst <dev at lankhorst.se>
Reviewed-by: Lucas De Marchi <lucas.demarchi at intel.com>
Lucas De Marchi
>---
> drivers/gpu/drm/xe/xe_gt_mcr.c | 47 ++++++++++++++++++--------------
> drivers/gpu/drm/xe/xe_gt_types.h | 2 ++
> 2 files changed, 29 insertions(+), 20 deletions(-)
>
>diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
>index d4d9730f0d2c7..64a2f0d6aaf95 100644
>--- a/drivers/gpu/drm/xe/xe_gt_mcr.c
>+++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
>@@ -420,12 +420,6 @@ static void init_steering_sqidi_psmi(struct xe_gt *gt)
> gt->steering[SQIDI_PSMI].instance_target = select & 0x1;
> }
>
>-static void init_steering_inst0(struct xe_gt *gt)
>-{
>- gt->steering[INSTANCE0].group_target = 0; /* unused */
>- gt->steering[INSTANCE0].instance_target = 0; /* unused */
>-}
>-
> static const struct {
> const char *name;
> void (*init)(struct xe_gt *gt);
>@@ -436,7 +430,7 @@ static const struct {
> [DSS] = { "DSS", init_steering_dss },
> [OADDRM] = { "OADDRM / GPMXMT", init_steering_oaddrm },
> [SQIDI_PSMI] = { "SQIDI_PSMI", init_steering_sqidi_psmi },
>- [INSTANCE0] = { "INSTANCE 0", init_steering_inst0 },
>+ [INSTANCE0] = { "INSTANCE 0", NULL },
> [IMPLICIT_STEERING] = { "IMPLICIT", NULL },
> };
>
>@@ -446,25 +440,17 @@ static const struct {
> *
> * Perform early software only initialization of the MCR lock to allow
> * the synchronization on accessing the STEER_SEMAPHORE register and
>- * use the xe_gt_mcr_multicast_write() function.
>+ * use the xe_gt_mcr_multicast_write() function, plus the minimum
>+ * safe MCR registers required for VRAM/CCS probing.
> */
> void xe_gt_mcr_init_early(struct xe_gt *gt)
> {
>+ struct xe_device *xe = gt_to_xe(gt);
>+
> BUILD_BUG_ON(IMPLICIT_STEERING + 1 != NUM_STEERING_TYPES);
> BUILD_BUG_ON(ARRAY_SIZE(xe_steering_types) != NUM_STEERING_TYPES);
>
> spin_lock_init(>->mcr_lock);
>-}
>-
>-/**
>- * xe_gt_mcr_init - Normal initialization of the MCR support
>- * @gt: GT structure
>- *
>- * Perform normal initialization of the MCR for all usages.
>- */
>-void xe_gt_mcr_init(struct xe_gt *gt)
>-{
>- struct xe_device *xe = gt_to_xe(gt);
>
> if (IS_SRIOV_VF(xe))
> return;
>@@ -505,10 +491,27 @@ void xe_gt_mcr_init(struct xe_gt *gt)
> }
> }
>
>+ /* Mark instance 0 as initialized, we need this early for VRAM and CCS probe. */
>+ gt->steering[INSTANCE0].initialized = true;
>+}
>+
>+/**
>+ * xe_gt_mcr_init - Normal initialization of the MCR support
>+ * @gt: GT structure
>+ *
>+ * Perform normal initialization of the MCR for all usages.
>+ */
>+void xe_gt_mcr_init(struct xe_gt *gt)
>+{
>+ if (IS_SRIOV_VF(gt_to_xe(gt)))
>+ return;
>+
> /* Select non-terminated steering target for each type */
>- for (int i = 0; i < NUM_STEERING_TYPES; i++)
>+ for (int i = 0; i < NUM_STEERING_TYPES; i++) {
>+ gt->steering[i].initialized = true;
> if (gt->steering[i].ranges && xe_steering_types[i].init)
> xe_steering_types[i].init(gt);
>+ }
> }
>
> /**
>@@ -570,6 +573,10 @@ bool xe_gt_mcr_get_nonterminated_steering(struct xe_gt *gt,
>
> for (int i = 0; gt->steering[type].ranges[i].end > 0; i++) {
> if (xe_mmio_in_range(>->mmio, >->steering[type].ranges[i], reg)) {
>+ drm_WARN(>_to_xe(gt)->drm, !gt->steering[type].initialized,
>+ "Uninitialized usage of MCR register %s/%#x\n",
>+ xe_steering_types[type].name, reg.addr);
>+
> *group = gt->steering[type].group_target;
> *instance = gt->steering[type].instance_target;
> return true;
>diff --git a/drivers/gpu/drm/xe/xe_gt_types.h b/drivers/gpu/drm/xe/xe_gt_types.h
>index 7def0959da35d..96344c6047260 100644
>--- a/drivers/gpu/drm/xe/xe_gt_types.h
>+++ b/drivers/gpu/drm/xe/xe_gt_types.h
>@@ -377,6 +377,8 @@ struct xe_gt {
> u16 group_target;
> /** @steering.instance_target: instance to steer accesses to */
> u16 instance_target;
>+ /** @steering.initialized: Whether this steering range is initialized */
>+ bool initialized;
> } steering[NUM_STEERING_TYPES];
>
> /**
>--
>2.45.2
>
More information about the Intel-xe
mailing list