[RESEND PATCH 0/8] VRR Refactor
Ankit Nautiyal
ankit.k.nautiyal at intel.com
Tue Mar 11 09:37:43 UTC 2025
To move away from legacy timing generator and always use VRR timing
generator, some refactoring is required in existing VRR code.
This series is a spinoff from the original series [1], tackling only VRR
refactoring patches from the main series.
[1] https://patchwork.freedesktop.org/series/141152/
Ankit Nautiyal (8):
drm/i915/vrr: Remove unwanted comment
drm/i915:vrr: Separate out functions to compute vmin and vmax
drm/i915/vrr: Make helpers for cmrr and vrr timings
drm/i915/vrr: Disable CMRR
drm/i915/vrr: Track vrr.enable only for variable timing
drm/i915/vrr: Use crtc_vtotal for vmin
drm/i915/vrr: Prepare for fixed refresh rate timings
drm/i915/display: Enable MSA Ignore Timing PAR only when in not
fixed_rr mode
.../drm/i915/display/intel_dp_link_training.c | 15 +-
drivers/gpu/drm/i915/display/intel_vrr.c | 185 ++++++++++++++----
2 files changed, 166 insertions(+), 34 deletions(-)
--
2.45.2
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