[PATCH 2/2] drm/xe/vf: Catch all unexpected register reads

[Ghimiray, Himal Prasad]

On 11-03-2025 19:27, Michal Wajdeczko wrote:
> While we can only mimic read32 for a few GT registers for which
> the PF shared the values, we shouldn't avoid calling helper code
> if we try to access non-GT register, as then we miss to trigger
> a debug warning. For cases where sriov_vf_gt was not set, just
> use primary_gt instead.

Under what scenario sriov_vf_gt can be not set for VF ?
Isn't this initialized for each gt during probe for VF ?

> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Matt Roper <matthew.d.roper at intel.com>
> ---
>   drivers/gpu/drm/xe/xe_mmio.c | 10 ++++++----
>   1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_mmio.c b/drivers/gpu/drm/xe/xe_mmio.c
> index 70a36e777546..13e06a956ceb 100644
> --- a/drivers/gpu/drm/xe/xe_mmio.c
> +++ b/drivers/gpu/drm/xe/xe_mmio.c
> @@ -204,8 +204,9 @@ void xe_mmio_write32(struct xe_mmio *mmio, struct xe_reg reg, u32 val)
>   
>   	trace_xe_reg_rw(mmio, true, addr, val, sizeof(val));
>   
> -	if (!reg.vf && mmio->sriov_vf_gt)
> -		xe_gt_sriov_vf_write32(mmio->sriov_vf_gt, reg, val);
> +	if (!reg.vf && IS_SRIOV_VF(mmio->tile->xe))
> +		xe_gt_sriov_vf_write32(mmio->sriov_vf_gt ?:
> +				       mmio->tile->primary_gt, reg, val);
>   	else
>   		writel(val, mmio->regs + addr);
>   }
> @@ -218,8 +219,9 @@ u32 xe_mmio_read32(struct xe_mmio *mmio, struct xe_reg reg)
>   	/* Wa_15015404425 */
>   	mmio_flush_pending_writes(mmio);
>   
> -	if (!reg.vf && mmio->sriov_vf_gt)
> -		val = xe_gt_sriov_vf_read32(mmio->sriov_vf_gt, reg);
> +	if (!reg.vf && IS_SRIOV_VF(mmio->tile->xe))
> +		val = xe_gt_sriov_vf_read32(mmio->sriov_vf_gt ?:
> +					    mmio->tile->primary_gt, reg);
>   	else
>   		val = readl(mmio->regs + addr);
>