[PATCH] drm/i915/display: Maintain asciibetical order for HAS_* macros

[Nautiyal, Ankit K]

On 3/12/2025 4:55 PM, Jani Nikula wrote:
> On Wed, 12 Mar 2025, Ankit Nautiyal <ankit.k.nautiyal at intel.com> wrote:
>> Move HAS_* macros to maintain asciibetical order.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
> Reviewed-by: Jani Nikula <jani.nikula at intel.com>
Thanks, Jani, for the review and for explaining the details. I've pushed 
the change to drm-intel-next.

Regards,
Ankit
>
>
>> ---
>>   drivers/gpu/drm/i915/display/intel_display_device.h | 8 ++++----
>>   1 file changed, 4 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
>> index 717286981687..4e9630f65af6 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
>> @@ -143,9 +143,11 @@ struct intel_display_platforms {
>>   
>>   #define HAS_4TILE(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
>>   #define HAS_ASYNC_FLIPS(__display)	(DISPLAY_VER(__display) >= 5)
>> +#define HAS_AS_SDP(__display)		(DISPLAY_VER(__display) >= 13)
>>   #define HAS_BIGJOINER(__display)	(DISPLAY_VER(__display) >= 11 && HAS_DSC(__display))
>>   #define HAS_CDCLK_CRAWL(__display)	(DISPLAY_INFO(__display)->has_cdclk_crawl)
>>   #define HAS_CDCLK_SQUASH(__display)	(DISPLAY_INFO(__display)->has_cdclk_squash)
>> +#define HAS_CMRR(__display)		(DISPLAY_VER(__display) >= 20)
>>   #define HAS_CMTG(__display)		(!(__display)->platform.dg2 && DISPLAY_VER(__display) >= 13)
>>   #define HAS_CUR_FBC(__display)		(!HAS_GMCH(__display) && IS_DISPLAY_VER(__display, 7, 13))
>>   #define HAS_D12_PLANE_MINIMIZATION(__display)	((__display)->platform.rocketlake || (__display)->platform.alderlake_s)
>> @@ -156,9 +158,9 @@ struct intel_display_platforms {
>>   #define HAS_DMC_WAKELOCK(__display)	(DISPLAY_VER(__display) >= 20)
>>   #define HAS_DOUBLE_BUFFERED_M_N(__display)	(DISPLAY_VER(__display) >= 9 || (__display)->platform.broadwell)
>>   #define HAS_DOUBLE_WIDE(__display)	(DISPLAY_VER(__display) < 4)
>> -#define HAS_DP_MST(__display)		(DISPLAY_INFO(__display)->has_dp_mst)
>>   #define HAS_DP20(__display)		((__display)->platform.dg2 || DISPLAY_VER(__display) >= 14)
>>   #define HAS_DPT(__display)		(DISPLAY_VER(__display) >= 13)
>> +#define HAS_DP_MST(__display)		(DISPLAY_INFO(__display)->has_dp_mst)
>>   #define HAS_DSB(__display)		(DISPLAY_INFO(__display)->has_dsb)
>>   #define HAS_DSC(__display)		(DISPLAY_RUNTIME_INFO(__display)->has_dsc)
>>   #define HAS_DSC_MST(__display)		(DISPLAY_VER(__display) >= 12 && HAS_DSC(__display))
>> @@ -166,8 +168,8 @@ struct intel_display_platforms {
>>   #define HAS_FBC_DIRTY_RECT(__display)	(DISPLAY_VER(__display) >= 30)
>>   #define HAS_FPGA_DBG_UNCLAIMED(__display)	(DISPLAY_INFO(__display)->has_fpga_dbg)
>>   #define HAS_FW_BLC(__display)		(DISPLAY_VER(__display) >= 3)
>> -#define HAS_GMBUS_IRQ(__display)	(DISPLAY_VER(__display) >= 4)
>>   #define HAS_GMBUS_BURST_READ(__display)	(DISPLAY_VER(__display) >= 10 || (__display)->platform.kabylake)
>> +#define HAS_GMBUS_IRQ(__display)	(DISPLAY_VER(__display) >= 4)
>>   #define HAS_GMCH(__display)		(DISPLAY_INFO(__display)->has_gmch)
>>   #define HAS_HW_SAGV_WM(__display)	(DISPLAY_VER(__display) >= 13 && !(__display)->platform.dgfx)
>>   #define HAS_IPC(__display)		(DISPLAY_INFO(__display)->has_ipc)
>> @@ -189,8 +191,6 @@ struct intel_display_platforms {
>>   					  ((__display)->platform.dgfx && DISPLAY_VER(__display) == 14)) && \
>>   					 HAS_DSC(__display))
>>   #define HAS_VRR(__display)		(DISPLAY_VER(__display) >= 11)
>> -#define HAS_AS_SDP(__display)		(DISPLAY_VER(__display) >= 13)
>> -#define HAS_CMRR(__display)		(DISPLAY_VER(__display) >= 20)
>>   #define INTEL_NUM_PIPES(__display)	(hweight8(DISPLAY_RUNTIME_INFO(__display)->pipe_mask))
>>   #define I915_HAS_HOTPLUG(__display)	(DISPLAY_INFO(__display)->has_hotplug)
>>   #define OVERLAY_NEEDS_PHYSICAL(__display)	(DISPLAY_INFO(__display)->overlay_needs_physical)