✗ CI.checkpatch: warning for AuxCCS handling and render compression modifiers (rev3)
Patchwork
patchwork at emeril.freedesktop.org
Tue Mar 18 16:27:28 UTC 2025
== Series Details ==
Series: AuxCCS handling and render compression modifiers (rev3)
URL : https://patchwork.freedesktop.org/series/144186/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://github.com/intel-lgci-fdo-gitlab-mirror/drm.maintainer-tools mt
Cloning into 'mt'...
+ git -C mt rev-list -n1 origin/master
cbb4e4a079d89106c2736adc3c7de6f9dc56da07
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 239f90c58b6157eb721d93157ea402ecf4b5cc3b
Author: Tvrtko Ursulin <tvrtko.ursulin at igalia.com>
Date: Tue Mar 18 16:22:23 2025 +0000
drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe
Now that we have fixed the DPT handling we can undo the nerf which was
done in cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if
built for Xe").
Tested with KDE Wayland, on Lenovo Carbon X1 ADL-P:
[PLANE:32:plane 1A]: type=PRI
uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
hw: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=yes, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
Display working fine - no artefacts, no DMAR/PIPE faults.
v2:
* Adjust patch title. (Rodrigo)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at igalia.com>
References: cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")
Cc: José Roberto de Souza <jose.souza at intel.com>
Cc: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
+ /mt/dim checkpatch a958e31a81b3267201c85b6f171419586afa792c drm-intel
869783a622e5 drm/xe: Add ring buffer handling for AuxCCS
-:19: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#19: FILE: drivers/gpu/drm/xe/instructions/xe_gpu_commands.h:48:
+#define PIPE_CONTROL_FLUSH_L3 (1<<27)
^
total: 0 errors, 0 warnings, 1 checks, 315 lines checked
3d4823e73abe drm/xe: Use fb cached min alignment
f0dff0087dea drm/xe: Reduce DPT table alignment as in i915
cd253c1e1368 drm/xe: Flush GGTT writes after populating DPT
-:72: WARNING:MEMORY_BARRIER: memory barrier without comment
#72: FILE: drivers/gpu/drm/xe/display/xe_fb_pin.c:115:
+ wmb();
total: 0 errors, 1 warnings, 0 checks, 66 lines checked
1271d18ed874 drm/xe: Handle DPT in system memory
006a9eb37e14 drm/xe: Force flush system memory AuxCCS framebuffers before scan out
926873e74fa0 drm/xe/display: Add support for AuxCCS
-:83: CHECK:ASSIGNMENT_CONTINUATIONS: Assignment operator '=' should be on the previous line
#83: FILE: drivers/gpu/drm/xe/display/xe_fb_pin.c:95:
+ u64 (*pte_encode_bo)(struct xe_bo *bo, u64 bo_offset, u16 pat_index)
+ = ggtt->pt_ops->pte_encode_bo;
total: 0 errors, 0 warnings, 1 checks, 133 lines checked
239f90c58b61 drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe
-:10: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if built for Xe")'
#10:
done in cf48bddd31de ("drm/i915/display: Disable AuxCCS framebuffers if
-:16: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible unwrapped commit description?)
#16:
uapi: [FB:242] AR30 little-endian (0x30335241),0x100000000000008,2880x1800, visible=visible, src=2880.000000x1800.000000+0.000000+0.000000, dst=2880x1800+0+0, rotation=0 (0x00000001)
total: 1 errors, 1 warnings, 0 checks, 12 lines checked
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