✗ CI.checkpatch: warning for Implement Wa_14021768792 to bypass m_n ratio limit (rev4)

[Patchwork]

== Series Details ==

Series: Implement Wa_14021768792 to bypass m_n ratio limit (rev4)
URL   : https://patchwork.freedesktop.org/series/138256/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
cbb4e4a079d89106c2736adc3c7de6f9dc56da07
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 55182368c8e8451d0a08cc434730775eea85d087
Author: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
Date:   Fri Mar 21 16:56:50 2025 +0530

    drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n ratio > 10
    
    Handle the bypass logic for the M/N ratio limit for DP.
    Calculate the M/N ratio, check if it can bypass the limit, and set the
    appropriate flags for the workaround.
    
    Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
+ /mt/dim checkpatch b15a87713d14b1c2986f47a622c5a8c5458e2396 drm-intel
7253c4c79bc6 Add bits for link_n_exended for DISPLAY >= 14
352dab6967ed drm/i915/display: Limit m/n ratio to 10 for display > 12
93d7f9891d46 drm/i915/display: Add bits for Wa_14021768792 for linkm/n ratio > 10
-:218: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#218: FILE: drivers/gpu/drm/i915/display/intel_display.c:5195:
+				     "found tu %i, data %i/%i link %i/%i bypass_m_n_ratio_limit %s)", \

total: 0 errors, 1 warnings, 0 checks, 225 lines checked
55182368c8e8 drm/i915/display: Implement Wa_14021768792 for BMG DP for link_m/n ratio > 10