[PATCH v2] drm/i915/xe2hpd: Identify the memory type for SKUs with GDDR + ECC

[Matt Roper]

On Mon, Mar 24, 2025 at 10:22:33AM -0700, Lucas De Marchi wrote:
> From: Vivek Kasireddy <vivek.kasireddy at intel.com>
> 
> Some SKUs of Xe2_HPD platforms (such as BMG) have GDDR memory type
> with ECC enabled. We need to identify this scenario and add a new
> case in xelpdp_get_dram_info() to handle it. In addition, the
> derating value needs to be adjusted accordingly to compensate for
> the limited bandwidth.
> 
> Bspec: 64602
> Cc: Matt Roper <matthew.d.roper at intel.com>
> Fixes: 3adcf970dc7e ("drm/xe/bmg: Drop force_probe requirement")
> Cc: stable at vger.kernel.org
> Signed-off-by: Vivek Kasireddy <vivek.kasireddy at intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi at intel.com>

Reviewed-by: Matt Roper <matthew.d.roper at intel.com>

> ---
> Changes in v2:
> - Add a separate sa_info for the ecc case (Lucas)
> - Link to v1: https://lore.kernel.org/r/20250214215944.187407-1-vivek.kasireddy@intel.com
> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 12 ++++++++++++
>  drivers/gpu/drm/i915/i915_drv.h         |  1 +
>  drivers/gpu/drm/i915/soc/intel_dram.c   |  4 ++++
>  drivers/gpu/drm/xe/xe_device_types.h    |  1 +
>  4 files changed, 18 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
> index dc7612658a9da..bb81efec08a01 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -250,6 +250,7 @@ static int icl_get_qgv_points(struct intel_display *display,
>  			qi->deinterleave = 4;
>  			break;
>  		case INTEL_DRAM_GDDR:
> +		case INTEL_DRAM_GDDR_ECC:
>  			qi->channel_width = 32;
>  			break;
>  		default:
> @@ -404,6 +405,12 @@ static const struct intel_sa_info xe2_hpd_sa_info = {
>  	/* Other values not used by simplified algorithm */
>  };
>  
> +static const struct intel_sa_info xe2_hpd_ecc_sa_info = {
> +	.derating = 45,
> +	.deprogbwlimit = 53,
> +	/* Other values not used by simplified algorithm */
> +};
> +
>  static const struct intel_sa_info xe3lpd_sa_info = {
>  	.deburst = 32,
>  	.deprogbwlimit = 65, /* GB/s */
> @@ -756,11 +763,16 @@ static unsigned int icl_qgv_bw(struct intel_display *display,
>  
>  void intel_bw_init_hw(struct intel_display *display)
>  {
> +	const struct dram_info *dram_info = &to_i915(display->drm)->dram_info;
> +
>  	if (!HAS_DISPLAY(display))
>  		return;
>  
>  	if (DISPLAY_VER(display) >= 30)
>  		tgl_get_bw_info(display, &xe3lpd_sa_info);
> +	else if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx &&
> +		 dram_info->type == INTEL_DRAM_GDDR_ECC)
> +		xe2_hpd_get_bw_info(display, &xe2_hpd_ecc_sa_info);
>  	else if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx)
>  		xe2_hpd_get_bw_info(display, &xe2_hpd_sa_info);
>  	else if (DISPLAY_VER(display) >= 14)
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ffc346379cc2c..54538b6f85df5 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -305,6 +305,7 @@ struct drm_i915_private {
>  			INTEL_DRAM_DDR5,
>  			INTEL_DRAM_LPDDR5,
>  			INTEL_DRAM_GDDR,
> +			INTEL_DRAM_GDDR_ECC,
>  		} type;
>  		u8 num_qgv_points;
>  		u8 num_psf_gv_points;
> diff --git a/drivers/gpu/drm/i915/soc/intel_dram.c b/drivers/gpu/drm/i915/soc/intel_dram.c
> index 9e310f4099f42..f60eedb0e92cf 100644
> --- a/drivers/gpu/drm/i915/soc/intel_dram.c
> +++ b/drivers/gpu/drm/i915/soc/intel_dram.c
> @@ -687,6 +687,10 @@ static int xelpdp_get_dram_info(struct drm_i915_private *i915)
>  		drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
>  		dram_info->type = INTEL_DRAM_GDDR;
>  		break;
> +	case 9:
> +		drm_WARN_ON(&i915->drm, !IS_DGFX(i915));
> +		dram_info->type = INTEL_DRAM_GDDR_ECC;
> +		break;
>  	default:
>  		MISSING_CASE(val);
>  		return -EINVAL;
> diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
> index 1334174388afe..20239d6a2e985 100644
> --- a/drivers/gpu/drm/xe/xe_device_types.h
> +++ b/drivers/gpu/drm/xe/xe_device_types.h
> @@ -587,6 +587,7 @@ struct xe_device {
>  			INTEL_DRAM_DDR5,
>  			INTEL_DRAM_LPDDR5,
>  			INTEL_DRAM_GDDR,
> +			INTEL_DRAM_GDDR_ECC,
>  		} type;
>  		u8 num_qgv_points;
>  		u8 num_psf_gv_points;
> 
> ---
> base-commit: 74f632d1bd3b90ed79883361ca25f1225c0aee58
> change-id: 20250321-tip-23d2af2e3291
> 
> Best regards,
> -- 
> Lucas De Marchi <lucas.demarchi at intel.com>
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation