[PATCH v4] drm/xe/pmu: Add GT frequency events

Belgaumkar, Vinay vinay.belgaumkar at intel.com
Tue Mar 25 02:37:32 UTC 2025


On 3/24/2025 5:18 PM, Dixit, Ashutosh wrote:
> On Mon, 24 Mar 2025 16:24:02 -0700, Vinay Belgaumkar wrote:
>> @@ -266,11 +274,24 @@ static u64 __xe_pmu_event_read(struct perf_event *event)
>> 	case XE_PMU_EVENT_ENGINE_ACTIVE_TICKS:
>> 	case XE_PMU_EVENT_ENGINE_TOTAL_TICKS:
>> 		return read_engine_events(gt, event);
>> +	case XE_PMU_EVENT_GT_ACTUAL_FREQUENCY:
>> +		return xe_guc_pc_get_act_freq(&gt->uc.guc.pc);
>> +	case XE_PMU_EVENT_GT_REQUESTED_FREQUENCY:
>> +		if (!xe_guc_pc_get_cur_freq(&gt->uc.guc.pc, &cur_gt_freq))
> This is unconditionally taking the forcewake and waking the card up just to
> get the sample. Do we really want to do that?
>
> So if we don't do that, both the actual and requested freq will be 0 if gt
> is in C6.

For actual frequency, the register(0xc60) does not belong to any fw domain -

GEN_FW_RANGE(0xc00, 0xfff, 0),

HW will report 0 when GT is in C6. The requested freq register is a 
shadowed register (0xa008), so that will not accrue fwake either.

static const struct i915_range mtl_shadowed_regs[] = {
         { .start =   0x2030, .end =   0x2030 },
         { .start =   0x2510, .end =   0x2550 },
         { .start =   0xA008, .end =   0xA00C },

Thanks,

Vinay.


>
>> +			return cur_gt_freq;


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