✓ CI.checkpatch: success for VRR Register Read/Write Updates

Patchwork patchwork at emeril.freedesktop.org
Wed Mar 26 04:23:15 UTC 2025


== Series Details ==

Series: VRR Register Read/Write Updates
URL   : https://patchwork.freedesktop.org/series/146777/
State : success

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
99e5a866b5e13f134e606a3e29d9508d97826fb3
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit a65df8f4c9615600d417ae1f1d1f0d6bea0f0ce4
Author: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
Date:   Wed Mar 26 09:35:38 2025 +0530

    drm/i915/display: Avoid use of VTOTAL.Vtotal bits
    
    For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
    bits are not required. Since the support for these bits is going to
    be deprecated in upcoming platforms, avoid writing these bits for the
    platforms that do not use legacy Timing Generator.
    
    Since for these platforms TRAN_VMIN is always filled with crtc_vtotal,
    use TRAN_VRR_VMIN to get the vtotal for adjusted_mode.
    
    v2: Avoid having a helper for manipulating VTOTAL register, and instead
    just make the change where required. (Ville)
    
    Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
+ /mt/dim checkpatch afc2e1fea0a406eedbaf632e96cdb6832a45ebb7 drm-intel
7e606dc8633e drm/i915/display: Introduce transcoder_has_vrr() helper
a65df8f4c961 drm/i915/display: Avoid use of VTOTAL.Vtotal bits




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