✓ CI.checkpatch: success for VRR Register Read/Write Updates (rev2)
Patchwork
patchwork at emeril.freedesktop.org
Wed Mar 26 16:58:49 UTC 2025
== Series Details ==
Series: VRR Register Read/Write Updates (rev2)
URL : https://patchwork.freedesktop.org/series/146777/
State : success
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
99e5a866b5e13f134e606a3e29d9508d97826fb3
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 53474ce5c600458e579b9fea6b068df5aad3f35d
Author: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
Date: Wed Mar 26 21:33:21 2025 +0530
drm/i915/display: Avoid use of VTOTAL.Vtotal bits
For platforms that always use VRR Timing Generator, the VTOTAL.Vtotal
bits are not required. Since the support for these bits is going to
be deprecated in upcoming platforms, avoid writing these bits for the
platforms that do not use legacy Timing Generator.
Since for these platforms TRAN_VMIN is always filled with crtc_vtotal,
use TRAN_VRR_VMIN to get the vtotal for adjusted_mode.
v2: Avoid having a helper for manipulating VTOTAL register, and instead
just make the change where required. (Ville)
v3: Set `crtc_vtotal` instead of working with the bits directly (Ville).
Use intel_vrr_vmin_vtotal() to set the vtotal during readout. (Ville)
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal at intel.com>
+ /mt/dim checkpatch 14c330bc015ded4a1f1dd1f5aeb8617077aaa7e8 drm-intel
c9636790cb96 drm/i915/display: Introduce transcoder_has_vrr() helper
53474ce5c600 drm/i915/display: Avoid use of VTOTAL.Vtotal bits
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