Re: ✗ Xe.CI.BAT: failure for series starting with [1/2] drm/xe: Remove extra spaces in xe_vm.c (rev2)

Matthew Auld matthew.auld at intel.com
Wed Mar 26 17:51:28 UTC 2025


On 25/03/2025 19:05, Thomas Hellström wrote:
> Hi,
> 
> On Tue, 2025-03-25 at 11:41 +0100, Maarten Lankhorst wrote:
>> Cc: Matthew Auld
>>
>> Hey,
>>
>> For peer-to-peer DMA-BUF, it can be beneficial to allow mapping
>> memory as uncached.
>> Initially I tried copying the caching on same-driver import from the
>> original BO.
>>
>> Thomas suggested that since memory access from discrete is always
>> coherent, the
>> check in xe_vm.c can be simplified from XE_IOCTL_DBG(xe, coh_mode ==
>> XE_COH_NONE)
>> to XE_IOCTL_DBG(xe, !ID_DGFX(xe) && coh_mode == XE_COH_NONE)
>>
>> This causes below failures.
>>
>> Should I continue with the original patch, or change the testcase as
>> well?
> 
> This is a tricky one.
> But first, why aren't those tests failing similarly with the original
> patch?
> 
> Also, If we were to use system dma-buf with the exported bo WB, then
> the app would fail anyway?
> 
> Perhaps we should use a separate test for p2p dma-bufs (attach-
>> peer2peer), but then again UMD wouldn't know whether it's peer2peer or
> not.
> 
> I think if we need to access cross-device bos for metadata, we need to
> check with Sima / Dave first. I don't think that's something that is
> encouraged, really.

If this is a concern, is it possible that we rather update the PAT table 
encoding on dgpu to reflect that everything is really 1way on dgpu i.e 
coh_none is not even a thing in the first place? Then we don't care 
about XE_IOCTL_DBG(xe, coh_mode == XE_COH_NONE)? But maybe that's too bold.

> 
> /Thomas
> 
> 
> 
> 
> 
> 
>>
>> Kind Regards,
>> ~Maarten
>>
>>
>> On 2025-03-25 10:37, Patchwork wrote:
>>> *Patch Details*
>>> *Series:*	series starting with [1/2] drm/xe: Remove extra
>>> spaces in xe_vm.c (rev2)
>>> *URL:*	
>>> https://patchwork.freedesktop.org/series/146562/ <https://patchwork
>>> .freedesktop.org/series/146562/>
>>> *State:*	failure
>>> *Details:*	
>>> https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-146562v2/index.html
>>>   <
>>> https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-146562v2/index.html
>>>>
>>>
>>>
>>>    CI Bug Log - changes from xe-2844-
>>> 9a42bdcde0f77b2c1e947e283cc3b267b1ce2056_BAT -> xe-pw-146562v2_BAT
>>>
>>>
>>>      Summary
>>>
>>> *FAILURE*
>>>
>>> Serious unknown changes coming with xe-pw-146562v2_BAT absolutely
>>> need to be
>>> verified manually.
>>>
>>> If you think the reported changes have nothing to do with the
>>> changes
>>> introduced in xe-pw-146562v2_BAT, please notify your bug team
>>> (I915-ci-infra at lists.freedesktop.org) to allow them
>>> to document this new failure mode, which will reduce false
>>> positives in CI.
>>>
>>>
>>>      Participating hosts (10 -> 9)
>>>
>>> Missing (1): bat-adlp-vm
>>>
>>>
>>>      Possible new issues
>>>
>>> Here are the unknown changes that may have been introduced in xe-
>>> pw-146562v2_BAT:
>>>
>>>
>>>        IGT changes
>>>
>>>
>>>          Possible regressions
>>>
>>>    * igt at xe_pat@prime-external-import-coh:
>>>        o bat-bmg-2: PASS
>>> <https://intel-gfx-ci.01.org/tree/intel-xe/xe-2844-9a42bdcde0f77b2c
>>> 1e947e283cc3b267b1ce2056/bat-bmg-2/igt at xe
>>> _pat at prime-external-import-coh.html> -> FAIL
>>> <https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-146562v2/bat-bmg-2
>>> /igt at xe_pat@prime-external-import-coh.html>
>>>        o bat-bmg-1: PASS
>>> <https://intel-gfx-ci.01.org/tree/intel-xe/xe-2844-9a42bdcde0f77b2c
>>> 1e947e283cc3b267b1ce2056/bat-bmg-1/igt at xe
>>> _pat at prime-external-import-coh.html> -> FAIL
>>> <https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-146562v2/bat-bmg-1
>>> /igt at xe_pat@prime-external-import-coh.html>
>>>        o bat-dg2-oem2: PASS
>>> <https://intel-gfx-ci.01.org/tree/intel-xe/xe-2844-9a42bdcde0f77b2c
>>> 1e947e283cc3b267b1ce2056/bat-dg2-oem2/igt at xe
>>> _pat at prime-external-import-coh.html> -> FAIL
>>> <https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-146562v2/bat-dg2-o
>>> em2/igt at xe_pat@prime-external-import-coh.html>
>>>        o bat-atsm-2: PASS
>>> <https://intel-gfx-ci.01.org/tree/intel-xe/xe-2844-9a42bdcde0f77b2c
>>> 1e947e283cc3b267b1ce2056/bat-atsm-2/igt at xe
>>> _pat at prime-external-import-coh.html> -> FAIL
>>> <https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-146562v2/bat-atsm
>>> -2/igt at xe_pat@prime-external-import-coh.html>
>>>        o bat-pvc-2: PASS
>>> <https://intel-gfx-ci.01.org/tree/intel-xe/xe-2844-9a42bdcde0f77b2c
>>> 1e947e283cc3b267b1ce2056/bat-pvc-2/igt at xe
>>> _pat at prime-external-import-coh.html> -> FAIL
>>> <https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-146562v2/bat-pvc-2
>>> /igt at xe_pat@prime-external-import-coh.html>
> 



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