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Hi Oak,<br>
<br>
<div class="moz-cite-prefix">Am 23.02.24 um 21:12 schrieb Zeng, Oak:<br>
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<p class="MsoNormal">Hi Christian,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I go back this old email to ask a question.</p>
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<br>
sorry totally missed that one.<br>
<br>
<blockquote type="cite" cite="mid:SA1PR11MB6991FDAFF07E3654538F5BBF92552@SA1PR11MB6991.namprd11.prod.outlook.com">
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<p class="MsoNormal"><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Quote from your email:<o:p></o:p></p>
<p class="MsoNormal">“Those ranges can then be used to implement
the SVM feature required for higher level APIs and not
something you need at the UAPI or even inside the low level
kernel memory management.”<o:p></o:p></p>
<p class="MsoNormal">“SVM is a high level concept of OpenCL,
Cuda, ROCm etc.. This should not have any influence on the
design of the kernel UAPI.”<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal"><span class="ui-provider">There are two
category of SVM:<o:p></o:p></span></p>
<ol style="margin-top:0cm" type="1" start="1">
<li class="MsoListParagraph" style="margin-left:0cm;mso-list:l0 level1 lfo1"><span class="ui-provider">driver svm allocator: this is
implemented in user space, i.g., cudaMallocManaged (cuda)
or zeMemAllocShared (L0) or clSVMAlloc(openCL). Intel
already have gem_create/vm_bind in xekmd and our umd
implemented clSVMAlloc and zeMemAllocShared on top of
gem_create/vm_bind.
</span>Range A..B of the process address space is mapped
into a range C..D of the GPU address space, exactly as you
said.<span class="ui-provider"><o:p></o:p></span></li>
<li class="MsoListParagraph" style="margin-left:0cm;mso-list:l0 level1 lfo1"><span class="ui-provider">system svm allocator: This doesn’t
introduce extra driver API for memory allocation. Any
valid CPU virtual address can be used directly
transparently in a GPU program without any extra driver
API call. Quote from kernel Documentation/vm/hmm.hst: “Any
application memory region (private anonymous, shared
memory, or regular file backed memory) can be used by a
device transparently” and “</span><span style="color:black">to share the address space by
duplicating the CPU page table in the device page table so
the same address points to the same physical memory for
any valid main memory address in the process address space</span><span class="ui-provider">”. In system svm allocator, we don’t
need that A..B C..D mapping.</span><span class="ui-provider"><o:p></o:p></span></li>
</ol>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">It looks like you were talking of 1). Were
you?</p>
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<br>
No, even when you fully mirror the whole address space from a
process into the GPU you still need to enable this somehow with an
IOCTL.<br>
<br>
And while enabling this you absolutely should specify to which part
of the address space this mirroring applies and where it maps to.<br>
<br>
I see the system svm allocator as just a special case of the driver
allocator where not fully backed buffer objects are allocated, but
rather sparse one which are filled and migrated on demand.<br>
<br>
Regards,<br>
Christian.<br>
<br>
<blockquote type="cite" cite="mid:SA1PR11MB6991FDAFF07E3654538F5BBF92552@SA1PR11MB6991.namprd11.prod.outlook.com">
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<p class="MsoNormal"><o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Oak<o:p></o:p></p>
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<p class="MsoNormal"><b><span lang="EN-US">From:</span></b><span lang="EN-US"> Christian König
<a class="moz-txt-link-rfc2396E" href="mailto:christian.koenig@amd.com"><christian.koenig@amd.com></a>
<br>
<b>Sent:</b> Wednesday, January 24, 2024 3:33 AM<br>
<b>To:</b> Zeng, Oak <a class="moz-txt-link-rfc2396E" href="mailto:oak.zeng@intel.com"><oak.zeng@intel.com></a>;
Danilo Krummrich <a class="moz-txt-link-rfc2396E" href="mailto:dakr@redhat.com"><dakr@redhat.com></a>; Dave Airlie
<a class="moz-txt-link-rfc2396E" href="mailto:airlied@redhat.com"><airlied@redhat.com></a>; Daniel Vetter
<a class="moz-txt-link-rfc2396E" href="mailto:daniel@ffwll.ch"><daniel@ffwll.ch></a>; Felix Kuehling
<a class="moz-txt-link-rfc2396E" href="mailto:felix.kuehling@amd.com"><felix.kuehling@amd.com></a><br>
<b>Cc:</b> Welty, Brian <a class="moz-txt-link-rfc2396E" href="mailto:brian.welty@intel.com"><brian.welty@intel.com></a>;
<a class="moz-txt-link-abbreviated" href="mailto:dri-devel@lists.freedesktop.org">dri-devel@lists.freedesktop.org</a>;
<a class="moz-txt-link-abbreviated" href="mailto:intel-xe@lists.freedesktop.org">intel-xe@lists.freedesktop.org</a>; Bommu, Krishnaiah
<a class="moz-txt-link-rfc2396E" href="mailto:krishnaiah.bommu@intel.com"><krishnaiah.bommu@intel.com></a>; Ghimiray, Himal
Prasad <a class="moz-txt-link-rfc2396E" href="mailto:himal.prasad.ghimiray@intel.com"><himal.prasad.ghimiray@intel.com></a>;
<a class="moz-txt-link-abbreviated" href="mailto:Thomas.Hellstrom@linux.intel.com">Thomas.Hellstrom@linux.intel.com</a>; Vishwanathapura,
Niranjana <a class="moz-txt-link-rfc2396E" href="mailto:niranjana.vishwanathapura@intel.com"><niranjana.vishwanathapura@intel.com></a>;
Brost, Matthew <a class="moz-txt-link-rfc2396E" href="mailto:matthew.brost@intel.com"><matthew.brost@intel.com></a>; Gupta,
saurabhg <a class="moz-txt-link-rfc2396E" href="mailto:saurabhg.gupta@intel.com"><saurabhg.gupta@intel.com></a><br>
<b>Subject:</b> Re: Making drm_gpuvm work across gpu
devices<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Am 23.01.24 um 20:37 schrieb Zeng, Oak:<br>
<br>
<o:p></o:p></p>
<blockquote style="margin-top:5.0pt;margin-bottom:5.0pt">
<p class="MsoNormal">[SNIP] <o:p></o:p></p>
<pre><o:p> </o:p></pre>
<pre>Yes most API are per device based.<o:p></o:p></pre>
<pre><o:p> </o:p></pre>
<pre>One exception I know is actually the kfd SVM API. If you look at the svm_ioctl function, it is per-process based. Each kfd_process represent a process across N gpu devices.<o:p></o:p></pre>
</blockquote>
<p class="MsoNormal"><br>
Yeah and that was a big mistake in my opinion. We should
really not do that ever again.<br>
<br>
<br>
<o:p></o:p></p>
<blockquote style="margin-top:5.0pt;margin-bottom:5.0pt">
<pre>Need to say, kfd SVM represent a shared virtual address space across CPU and all GPU devices on the system. This is by the definition of SVM (shared virtual memory). This is very different from our legacy gpu *device* driver which works for only one device (i.e., if you want one device to access another device's memory, you will have to use dma-buf export/import etc).<o:p></o:p></pre>
</blockquote>
<p class="MsoNormal"><br>
Exactly that thinking is what we have currently found as
blocker for a virtualization projects. Having SVM as device
independent feature which somehow ties to the process
address space turned out to be an extremely bad idea.<br>
<br>
The background is that this only works for some use cases
but not all of them.<br>
<br>
What's working much better is to just have a mirror
functionality which says that a range A..B of the process
address space is mapped into a range C..D of the GPU address
space.<br>
<br>
Those ranges can then be used to implement the SVM feature
required for higher level APIs and not something you need at
the UAPI or even inside the low level kernel memory
management.<br>
<br>
When you talk about migrating memory to a device you also do
this on a per device basis and *not* tied to the process
address space. If you then get crappy performance because
userspace gave contradicting information where to migrate
memory then that's a bug in userspace and not something the
kernel should try to prevent somehow.<br>
<br>
[SNIP]<br>
<br>
<o:p></o:p></p>
<blockquote style="margin-top:5.0pt;margin-bottom:5.0pt">
<blockquote style="margin-top:5.0pt;margin-bottom:5.0pt">
<pre>I think if you start using the same drm_gpuvm for multiple devices you<o:p></o:p></pre>
<pre>will sooner or later start to run into the same mess we have seen with<o:p></o:p></pre>
<pre>KFD, where we moved more and more functionality from the KFD to the DRM<o:p></o:p></pre>
<pre>render node because we found that a lot of the stuff simply doesn't work<o:p></o:p></pre>
<pre>correctly with a single object to maintain the state.<o:p></o:p></pre>
</blockquote>
<pre><o:p> </o:p></pre>
<pre>As I understand it, KFD is designed to work across devices. A single pseudo /dev/kfd device represent all hardware gpu devices. That is why during kfd open, many pdd (process device data) is created, each for one hardware device for this process.<o:p></o:p></pre>
</blockquote>
<p class="MsoNormal"><br>
Yes, I'm perfectly aware of that. And I can only repeat
myself that I see this design as a rather extreme failure.
And I think it's one of the reasons why NVidia is so
dominant with Cuda.<br>
<br>
This whole approach KFD takes was designed with the idea of
extending the CPU process into the GPUs, but this idea only
works for a few use cases and is not something we should
apply to drivers in general.<br>
<br>
A very good example are virtualization use cases where you
end up with CPU address != GPU address because the VAs are
actually coming from the guest VM and not the host process.<br>
<br>
SVM is a high level concept of OpenCL, Cuda, ROCm etc.. This
should not have any influence on the design of the kernel
UAPI.<br>
<br>
If you want to do something similar as KFD for Xe I think
you need to get explicit permission to do this from Dave and
Daniel and maybe even Linus.<br>
<br>
Regards,<br>
Christian.<o:p></o:p></p>
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