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<div class="moz-cite-prefix">On 3/18/2024 7:05 PM, Matthew Auld
wrote:<br>
</div>
<blockquote type="cite" cite="mid:20240318180532.57522-4-matthew.auld@intel.com">
<pre class="moz-quote-pre" wrap="">The engine_class is the index into the user_to_xe_engine_class,
therefore it needs to be less than.
Fixes: dd08ebf6c352 ("drm/xe: Introduce a new DRM driver for Intel GPUs")
Signed-off-by: Matthew Auld <a class="moz-txt-link-rfc2396E" href="mailto:matthew.auld@intel.com"><matthew.auld@intel.com></a>
Cc: Nirmoy Das <a class="moz-txt-link-rfc2396E" href="mailto:nirmoy.das@intel.com"><nirmoy.das@intel.com></a></pre>
</blockquote>
<br>
<pre class="moz-quote-pre" wrap=""><span style="padding: 0px; tab-size: 8;" class="hljs diff colorediffs language-diff">Reviewed-by: Nirmoy Das </span><a class="moz-txt-link-rfc2396E" href="mailto:nirmoy.das@intel.com"><nirmoy.das@intel.com></a><span style="padding: 0px; tab-size: 8;" class="hljs diff colorediffs language-diff"></span></pre>
<blockquote type="cite" cite="mid:20240318180532.57522-4-matthew.auld@intel.com">
<pre class="moz-quote-pre" wrap="">
---
drivers/gpu/drm/xe/xe_exec_queue.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 6a83bc57826a..2016c1af9633 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -440,7 +440,7 @@ find_hw_engine(struct xe_device *xe,
{
u32 idx;
- if (eci.engine_class > ARRAY_SIZE(user_to_xe_engine_class))
+ if (eci.engine_class >= ARRAY_SIZE(user_to_xe_engine_class))
return NULL;
if (eci.gt_id >= xe->info.gt_count)
</pre>
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