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    <div class="moz-cite-prefix">On 11-09-2024 14:56, Dnyaneshwar
      Bhadane wrote:<br>
    </div>
    <blockquote type="cite" cite="mid:20240911092657.2348978-1-dnyaneshwar.bhadane@intel.com">
      <pre class="moz-quote-pre" wrap="">Add new PCI id for ARL platform.

Signed-off-by: Dnyaneshwar Bhadane <a class="moz-txt-link-rfc2396E" href="mailto:dnyaneshwar.bhadane@intel.com"><dnyaneshwar.bhadane@intel.com></a>
---
 include/drm/intel/xe_pciids.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/include/drm/intel/xe_pciids.h b/include/drm/intel/xe_pciids.h
index 79001afa7d27d..5758924a5b4ca 100644
--- a/include/drm/intel/xe_pciids.h
+++ b/include/drm/intel/xe_pciids.h
@@ -181,7 +181,8 @@
        MACRO__(0x7D41, ## __VA_ARGS__),        \
        MACRO__(0x7D51, ## __VA_ARGS__),        \
        MACRO__(0x7D67, ## __VA_ARGS__),        \
-       MACRO__(0x7DD1, ## __VA_ARGS__)
+       MACRO__(0x7DD1, ## __VA_ARGS__),        \
+       MACRO__(0xB650, ## __VA_ARGS__)</pre>
    </blockquote>
    This should be 0xB640<br>
    <blockquote type="cite" cite="mid:20240911092657.2348978-1-dnyaneshwar.bhadane@intel.com">
      <pre class="moz-quote-pre" wrap="">
 
 /* MTL */
 #define XE_MTL_IDS(MACRO__, ...)               \</pre>
    </blockquote>
    <p>Thank You<br>
      Sai Teja<span style="white-space: pre-wrap">
</span></p>
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