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<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">> <span lang="EN-US" style="mso-fareast-language:EN-IN">-----Original Message-----</span></p>
<p class="MsoPlainText">> <span lang="EN-US" style="mso-fareast-language:EN-IN">From: Roper, Matthew D <matthew.d.roper@intel.com></span></p>
<p class="MsoPlainText">> <span lang="EN-US" style="mso-fareast-language:EN-IN">Sent: 29 April 2025 22:41</span></p>
<p class="MsoPlainText">> <span lang="EN-US" style="mso-fareast-language:EN-IN">To: Upadhyay, Tejas <tejas.upadhyay@intel.com></span></p>
<p class="MsoPlainText">> <span lang="EN-US" style="mso-fareast-language:EN-IN">Cc: intel-xe@lists.freedesktop.org; Ghimiray, Himal Prasad</span></p>
<p class="MsoPlainText">> <span lang="EN-US" style="mso-fareast-language:EN-IN"><himal.prasad.ghimiray@intel.com></span></p>
<p class="MsoPlainText">> <span lang="EN-US" style="mso-fareast-language:EN-IN">Subject: Re: [PATCH V2] drm/xe/tests/mocs: Hold XE_FORCEWAKE_ALL for</span></p>
<p class="MsoPlainText">> <span lang="EN-US" style="mso-fareast-language:EN-IN">LNCF regs</span></p>
<p class="MsoPlainText">> </p>
<p class="MsoPlainText">> On Mon, Apr 28, 2025 at 01:53:57PM +0530, Tejas Upadhyay wrote:</p>
<p class="MsoPlainText">> > LNCF registers report wrong values when XE_FORCEWAKE_GT only is held.</p>
<p class="MsoPlainText">> > Holding XE_FORCEWAKE_ALL ensures correct operations on LNCF regs.</p>
<p class="MsoPlainText">> ></p>
<p class="MsoPlainText">> > V2(Himal):</p>
<p class="MsoPlainText">> > - Use xe_force_wake_ref_has_domain</p>
<p class="MsoPlainText">> ></p>
<p class="MsoPlainText">> > Closes: <a href="https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1999">
<span style="color:windowtext;text-decoration:none">https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1999</span></a></p>
<p class="MsoPlainText">> </p>
<p class="MsoPlainText">> LNCF registers are part of the RENDER forcewake domain on Xe_LP platforms,</p>
<p class="MsoPlainText">> so using ALL is a brute force way to fix the problem on those. However the</p>
<p class="MsoPlainText">> LNCF registers are documented as being part of the GT domain from Xe_HPG</p>
<p class="MsoPlainText">> onward, so the existing code should have already been working correctly for</p>
<p class="MsoPlainText">> those platforms. However the original bug report was for both ADL-P (Xe_LP)</p>
<p class="MsoPlainText">> and DG2 (Xe_HPG) so it doesn't seem like forcewake should have been the</p>
<p class="MsoPlainText">> cause of the DG2 errors.</p>
<p class="MsoPlainText">> </p>
<p class="MsoPlainText">> Have you confirmed that the issue has vanished on DG2 (not just ADL)?</p>
<p class="MsoPlainText"><span style="color:black"><o:p> </o:p></span></p>
<p class="MsoPlainText"><span style="color:black">Pre-merge results confirmed that,<o:p></o:p></span></p>
<p class="MsoPlainText"><span style="color:black"><img border="0" width="967" height="106" style="width:10.0763in;height:1.1041in" id="Picture_x0020_1" src="cid:image001.png@01DBB9AE.C309F7A0"></span><span style="color:black"><o:p></o:p></span></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText"><a href="https://patchwork.freedesktop.org/series/147446/#rev1">https://patchwork.freedesktop.org/series/147446/#rev1</a><o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">There are other instances in xe driver where we use FORCEWAKE_ALL for LNCF, for example see below,<o:p></o:p></p>
<p class="MsoPlainText">void xe_mocs_dump(struct xe_gt *gt, struct drm_printer *p)<o:p></o:p></p>
<p class="MsoPlainText">{<o:p></o:p></p>
<p class="MsoPlainText"> struct xe_device *xe = gt_to_xe(gt);<o:p></o:p></p>
<p class="MsoPlainText"> struct xe_mocs_info table;<o:p></o:p></p>
<p class="MsoPlainText"> unsigned int fw_ref, flags;<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText"> flags = get_mocs_settings(xe, &table);<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText"> xe_pm_runtime_get_noresume(xe);<o:p></o:p></p>
<p class="MsoPlainText"> fw_ref = xe_force_wake_get(gt_to_fw(gt),<o:p></o:p></p>
<p class="MsoPlainText"> flags & HAS_LNCF_MOCS ?<o:p></o:p></p>
<p class="MsoPlainText"> XE_FORCEWAKE_ALL : XE_FW_GT);<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">Tejas<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">> If so, you should feed your findings back to the hardware team in case the</p>
<p class="MsoPlainText">> documentation for this register range is incorrect. There are a number of</p>
<p class="MsoPlainText">> other LNCF and LBCF registers that the driver accesses so we should make</p>
<p class="MsoPlainText">> sure we figure out what's actually happening here. Also,</p>
<p class="MsoPlainText">> i915 (the official driver for DG2) is still using GT forcewake for the LNCF</p>
<p class="MsoPlainText">> registers on DG2 and isn't seeing problems like this, which makes it</p>
<p class="MsoPlainText">> questionable as to whether this is truly the root cause.</p>
<p class="MsoPlainText">> </p>
<p class="MsoPlainText">> </p>
<p class="MsoPlainText">> Matt</p>
<p class="MsoPlainText">> </p>
<p class="MsoPlainText">> > Fixes: a6a4ea6d7d37 ("drm/xe: Add mocs kunit")</p>
<p class="MsoPlainText">> > Signed-off-by: Tejas Upadhyay <<a href="mailto:tejas.upadhyay@intel.com"><span style="color:windowtext;text-decoration:none">tejas.upadhyay@intel.com</span></a>></p>
<p class="MsoPlainText">> > ---</p>
<p class="MsoPlainText">> > drivers/gpu/drm/xe/tests/xe_mocs.c | 7 +++++--</p>
<p class="MsoPlainText">> > 1 file changed, 5 insertions(+), 2 deletions(-)</p>
<p class="MsoPlainText">> ></p>
<p class="MsoPlainText">> > diff --git a/drivers/gpu/drm/xe/tests/xe_mocs.c</p>
<p class="MsoPlainText">> > b/drivers/gpu/drm/xe/tests/xe_mocs.c</p>
<p class="MsoPlainText">> > index ef1e5256c56a..0e502feaca81 100644</p>
<p class="MsoPlainText">> > --- a/drivers/gpu/drm/xe/tests/xe_mocs.c</p>
<p class="MsoPlainText">> > +++ b/drivers/gpu/drm/xe/tests/xe_mocs.c</p>
<p class="MsoPlainText">> > @@ -46,8 +46,11 @@ static void read_l3cc_table(struct xe_gt *gt,</p>
<p class="MsoPlainText">> > unsigned int fw_ref, i;</p>
<p class="MsoPlainText">> > u32 reg_val;</p>
<p class="MsoPlainText">> ></p>
<p class="MsoPlainText">> > - fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);</p>
<p class="MsoPlainText">> > - KUNIT_ASSERT_NE_MSG(test, fw_ref, 0, "Forcewake Failed.\n");</p>
<p class="MsoPlainText">> > + fw_ref = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);</p>
<p class="MsoPlainText">> > + if (!xe_force_wake_ref_has_domain(fw_ref, XE_FORCEWAKE_ALL)) {</p>
<p class="MsoPlainText">> > + xe_force_wake_put(gt_to_fw(gt), fw_ref);</p>
<p class="MsoPlainText">> > + KUNIT_ASSERT_TRUE_MSG(test, true, "Forcewake Failed.\n");</p>
<p class="MsoPlainText">> > + }</p>
<p class="MsoPlainText">> ></p>
<p class="MsoPlainText">> > for (i = 0; i < info->num_mocs_regs; i++) {</p>
<p class="MsoPlainText">> > if (!(i & 1)) {</p>
<p class="MsoPlainText">> > --</p>
<p class="MsoPlainText">> > 2.34.1</p>
<p class="MsoPlainText">> ></p>
<p class="MsoPlainText">> </p>
<p class="MsoPlainText">> --</p>
<p class="MsoPlainText">> Matt Roper</p>
<p class="MsoPlainText">> Graphics Software Engineer</p>
<p class="MsoPlainText">> Linux GPU Platform Enablement</p>
<p class="MsoPlainText">> Intel Corporation</p>
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