[Liboil-commit] 2 commits - doc/tmpl liboil/i386 liboil/i386_amd64 liboil/liboilcpu-x86.c liboil/liboilfunction.h testsuite/instruction

David Schleef ds at kemper.freedesktop.org
Mon Feb 18 14:00:22 PST 2008


 doc/tmpl/liboilimpl-unstable.sgml           |    1 
 liboil/i386/mas.c                           |    2 -
 liboil/i386/wavelet.c                       |    4 +-
 liboil/i386_amd64/addc.c                    |    8 ++---
 liboil/i386_amd64/sad8x8.c                  |   18 ++++++------
 liboil/liboilcpu-x86.c                      |   13 +++++++++
 liboil/liboilfunction.h                     |    6 +++-
 testsuite/instruction/check-instructions.pl |   39 ++++++++++++++++++++++++++++
 testsuite/instruction/list-impls.c          |    2 +
 9 files changed, 76 insertions(+), 17 deletions(-)

New commits:
commit 8bae319ec279527d8c0f6a8fbc0d1fbe63f075a7
Author: David Schleef <ds at ginger.bigkitten.com>
Date:   Mon Feb 18 14:02:16 2008 -0800

    Fix flags on some implementations.

diff --git a/liboil/i386/mas.c b/liboil/i386/mas.c
index 1d09a94..b8d4e00 100644
--- a/liboil/i386/mas.c
+++ b/liboil/i386/mas.c
@@ -797,7 +797,7 @@ mas8_u8_sym_mmx_6 (uint8_t *d, const uint8_t *s1_np7, const int16_t *s2_8,
         [s3_2] "r" (s3_2)
       : "ecx");
 }
-OIL_DEFINE_IMPL_FULL (mas8_u8_sym_mmx_6, mas8_u8_sym_l15, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
+OIL_DEFINE_IMPL_FULL (mas8_u8_sym_mmx_6, mas8_u8_sym_l15, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT|OIL_IMPL_FLAG_SSSE3);
 
 #ifdef ENABLE_BROKEN_IMPLS
 /* This only works for the taps array: -1, 3, -7, 21, 21, -7, 3, -1 */
diff --git a/liboil/i386/wavelet.c b/liboil/i386/wavelet.c
index 75e1de7..ec6fa3c 100644
--- a/liboil/i386/wavelet.c
+++ b/liboil/i386/wavelet.c
@@ -2721,7 +2721,7 @@ add2_rshift_add_s16_sse (int16_t *d1, int16_t *s1, int16_t *s2, int16_t *s3,
       :
       );
 }
-OIL_DEFINE_IMPL_FULL (add2_rshift_add_s16_sse, add2_rshift_add_s16, OIL_IMPL_FLAG_SSE);
+OIL_DEFINE_IMPL_FULL (add2_rshift_add_s16_sse, add2_rshift_add_s16, OIL_IMPL_FLAG_MMXEXT|OIL_IMPL_FLAG_SSE|OIL_IMPL_FLAG_SSE2);
 
 void
 add2_rshift_sub_s16_sse (int16_t *d1, int16_t *s1, int16_t *s2, int16_t *s3,
@@ -2774,5 +2774,5 @@ add2_rshift_sub_s16_sse (int16_t *d1, int16_t *s1, int16_t *s2, int16_t *s3,
       :
       );
 }
-OIL_DEFINE_IMPL_FULL (add2_rshift_sub_s16_sse, add2_rshift_sub_s16, OIL_IMPL_FLAG_SSE);
+OIL_DEFINE_IMPL_FULL (add2_rshift_sub_s16_sse, add2_rshift_sub_s16, OIL_IMPL_FLAG_MMXEXT|OIL_IMPL_FLAG_SSE|OIL_IMPL_FLAG_SSE2);
 
diff --git a/liboil/i386_amd64/addc.c b/liboil/i386_amd64/addc.c
index b9b6345..88d3d1d 100644
--- a/liboil/i386_amd64/addc.c
+++ b/liboil/i386_amd64/addc.c
@@ -41,7 +41,7 @@ addc_s16_mmx (int16_t *d, int16_t *s, int16_t *s2, int n)
         : [val] "r" (val));
   }
 }
-OIL_DEFINE_IMPL_FULL (addc_s16_mmx, addc_s16, OIL_IMPL_FLAG_MMX);
+OIL_DEFINE_IMPL_FULL (addc_s16_mmx, addc_s16, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
 
 void
 addc_s16_mmx2 (int16_t *d, int16_t *s, int16_t *s2, int n)
@@ -81,7 +81,7 @@ addc_s16_mmx2 (int16_t *d, int16_t *s, int16_t *s2, int n)
         : [val] "r" (val));
   }
 }
-OIL_DEFINE_IMPL_FULL (addc_s16_mmx2, addc_s16, OIL_IMPL_FLAG_MMX);
+OIL_DEFINE_IMPL_FULL (addc_s16_mmx2, addc_s16, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
 
 void
 addc_s16_sse (int16_t *d, int16_t *s, int16_t *s2, int n)
@@ -115,7 +115,7 @@ addc_s16_sse (int16_t *d, int16_t *s, int16_t *s2, int n)
         : [val] "r" (val));
   }
 }
-OIL_DEFINE_IMPL_FULL (addc_s16_sse, addc_s16, OIL_IMPL_FLAG_SSE);
+OIL_DEFINE_IMPL_FULL (addc_s16_sse, addc_s16, OIL_IMPL_FLAG_SSE|OIL_IMPL_FLAG_SSE2|OIL_IMPL_FLAG_MMXEXT);
 
 void
 addc_rshift_s16_mmx (int16_t *d, int16_t *s, int16_t *s2, int n)
@@ -163,5 +163,5 @@ addc_rshift_s16_mmx (int16_t *d, int16_t *s, int16_t *s2, int n)
         : [val] "r" (val), [shift] "r" (shift));
   }
 }
-OIL_DEFINE_IMPL_FULL (addc_rshift_s16_mmx, addc_rshift_s16, OIL_IMPL_FLAG_MMX);
+OIL_DEFINE_IMPL_FULL (addc_rshift_s16_mmx, addc_rshift_s16, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
 
diff --git a/liboil/i386_amd64/sad8x8.c b/liboil/i386_amd64/sad8x8.c
index 8fee8dd..239202a 100644
--- a/liboil/i386_amd64/sad8x8.c
+++ b/liboil/i386_amd64/sad8x8.c
@@ -547,7 +547,7 @@ combine4_12xn_u8_mmx (uint8_t *d, int ds1,
   }
   asm volatile ("emms");
 }
-OIL_DEFINE_IMPL_FULL (combine4_12xn_u8_mmx, combine4_12xn_u8, OIL_IMPL_FLAG_MMX);
+OIL_DEFINE_IMPL_FULL (combine4_12xn_u8_mmx, combine4_12xn_u8, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
 
 void
 combine4_8xn_u8_mmx (uint8_t *d, int ds1,
@@ -582,7 +582,7 @@ combine4_8xn_u8_mmx (uint8_t *d, int ds1,
   }
   asm volatile ("emms");
 }
-OIL_DEFINE_IMPL_FULL (combine4_8xn_u8_mmx, combine4_8xn_u8, OIL_IMPL_FLAG_MMX);
+OIL_DEFINE_IMPL_FULL (combine4_8xn_u8_mmx, combine4_8xn_u8, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
 
 void
 combine4_16xn_u8_mmx (uint8_t *d, int ds1,
@@ -619,7 +619,7 @@ combine4_16xn_u8_mmx (uint8_t *d, int ds1,
   }
   asm volatile ("emms");
 }
-OIL_DEFINE_IMPL_FULL (combine4_16xn_u8_mmx, combine4_16xn_u8, OIL_IMPL_FLAG_MMX);
+OIL_DEFINE_IMPL_FULL (combine4_16xn_u8_mmx, combine4_16xn_u8, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
 
 void
 combine2_12xn_u8_mmx (uint8_t *d, int ds1,
@@ -669,7 +669,7 @@ combine2_12xn_u8_mmx (uint8_t *d, int ds1,
   }
   asm volatile ("emms");
 }
-OIL_DEFINE_IMPL_FULL (combine2_12xn_u8_mmx, combine2_12xn_u8, OIL_IMPL_FLAG_MMX);
+OIL_DEFINE_IMPL_FULL (combine2_12xn_u8_mmx, combine2_12xn_u8, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
 
 void
 combine2_8xn_u8_mmx (uint8_t *d, int ds1,
@@ -703,7 +703,7 @@ combine2_8xn_u8_mmx (uint8_t *d, int ds1,
   }
   asm volatile ("emms");
 }
-OIL_DEFINE_IMPL_FULL (combine2_8xn_u8_mmx, combine2_8xn_u8, OIL_IMPL_FLAG_MMX);
+OIL_DEFINE_IMPL_FULL (combine2_8xn_u8_mmx, combine2_8xn_u8, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
 
 void
 combine2_16xn_u8_mmx (uint8_t *d, int ds1,
@@ -739,7 +739,7 @@ combine2_16xn_u8_mmx (uint8_t *d, int ds1,
   }
   asm volatile ("emms");
 }
-OIL_DEFINE_IMPL_FULL (combine2_16xn_u8_mmx, combine2_16xn_u8, OIL_IMPL_FLAG_MMX);
+OIL_DEFINE_IMPL_FULL (combine2_16xn_u8_mmx, combine2_16xn_u8, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
 
 #define AVG2_4(offset) \
         "  movd " #offset "(%1), %%mm0\n" \
@@ -774,7 +774,7 @@ avg2_8xn_u8_mmx (uint8_t *d, int ds1, uint8_t *s1, int ss1,
   }
   asm volatile ("emms");
 }
-OIL_DEFINE_IMPL_FULL (avg2_8xn_u8_mmx, avg2_8xn_u8, OIL_IMPL_FLAG_MMX);
+OIL_DEFINE_IMPL_FULL (avg2_8xn_u8_mmx, avg2_8xn_u8, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
 
 void
 avg2_12xn_u8_mmx (uint8_t *d, int ds1, uint8_t *s1, int ss1,
@@ -798,7 +798,7 @@ avg2_12xn_u8_mmx (uint8_t *d, int ds1, uint8_t *s1, int ss1,
   }
   asm volatile ("emms");
 }
-OIL_DEFINE_IMPL_FULL (avg2_12xn_u8_mmx, avg2_12xn_u8, OIL_IMPL_FLAG_MMX);
+OIL_DEFINE_IMPL_FULL (avg2_12xn_u8_mmx, avg2_12xn_u8, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
 
 void
 avg2_16xn_u8_mmx (uint8_t *d, int ds1, uint8_t *s1, int ss1,
@@ -822,5 +822,5 @@ avg2_16xn_u8_mmx (uint8_t *d, int ds1, uint8_t *s1, int ss1,
   }
   asm volatile ("emms");
 }
-OIL_DEFINE_IMPL_FULL (avg2_16xn_u8_mmx, avg2_16xn_u8, OIL_IMPL_FLAG_MMX);
+OIL_DEFINE_IMPL_FULL (avg2_16xn_u8_mmx, avg2_16xn_u8, OIL_IMPL_FLAG_MMX|OIL_IMPL_FLAG_MMXEXT);
 
commit 7f3e10f25c4315c2fd9d9000d7dee9bf8abefa4c
Author: David Schleef <ds at ginger.bigkitten.com>
Date:   Mon Feb 18 14:01:21 2008 -0800

    Add SSE3 and SSSE3 flags.

diff --git a/doc/tmpl/liboilimpl-unstable.sgml b/doc/tmpl/liboilimpl-unstable.sgml
index 706d2c3..209b549 100644
--- a/doc/tmpl/liboilimpl-unstable.sgml
+++ b/doc/tmpl/liboilimpl-unstable.sgml
@@ -62,6 +62,7 @@
 @OIL_IMPL_FLAG_EDSP: 
 @OIL_IMPL_FLAG_ARM6: 
 @OIL_IMPL_FLAG_VFP: 
+ at OIL_IMPL_FLAG_SSSE3: 
 
 <!-- ##### MACRO OIL_CPU_FLAG_MASK ##### -->
 <para>
diff --git a/liboil/liboilcpu-x86.c b/liboil/liboilcpu-x86.c
index 1b6917d..b192c76 100644
--- a/liboil/liboilcpu-x86.c
+++ b/liboil/liboilcpu-x86.c
@@ -107,6 +107,19 @@ oil_cpu_i386_getflags_cpuinfo (char *cpuinfo)
       OIL_DEBUG ("cpu flag %s", *f);
       oil_cpu_flags |= OIL_IMPL_FLAG_3DNOWEXT;
     }
+    if (strcmp (*f, "sse3") == 0) {
+      OIL_DEBUG ("cpu flag %s", *f);
+      oil_cpu_flags |= OIL_IMPL_FLAG_SSE3;
+      oil_cpu_flags |= OIL_IMPL_FLAG_SSE2;
+      oil_cpu_flags |= OIL_IMPL_FLAG_MMXEXT;
+    }
+    if (strcmp (*f, "ssse3") == 0) {
+      OIL_DEBUG ("cpu flag %s", *f);
+      oil_cpu_flags |= OIL_IMPL_FLAG_SSSE3;
+      oil_cpu_flags |= OIL_IMPL_FLAG_SSE3;
+      oil_cpu_flags |= OIL_IMPL_FLAG_SSE2;
+      oil_cpu_flags |= OIL_IMPL_FLAG_MMXEXT;
+    }
 
     free (*f);
   }
diff --git a/liboil/liboilfunction.h b/liboil/liboilfunction.h
index 34c6b74..2d1f505 100644
--- a/liboil/liboilfunction.h
+++ b/liboil/liboilfunction.h
@@ -83,6 +83,9 @@ OIL_BEGIN_DECLS
  * @OIL_IMPL_FLAG_SSE3: uses SSE3 instructions.  This flag implies
  * @OIL_IMPL_FLAG_SSE2.
  *
+ * @OIL_IMPL_FLAG_SSSE3: uses SSSE3 instructions.  This flag implies
+ * @OIL_IMPL_FLAG_SSE3.
+ *
  * @OIL_IMPL_FLAG_ALTIVEC: uses Altivec instructions.
  *
  */
@@ -102,7 +105,8 @@ typedef enum {
   OIL_IMPL_FLAG_ALTIVEC = (1<<24),
   OIL_IMPL_FLAG_EDSP = (1<<25),
   OIL_IMPL_FLAG_ARM6 = (1<<26),
-  OIL_IMPL_FLAG_VFP = (1<<27)
+  OIL_IMPL_FLAG_VFP = (1<<27),
+  OIL_IMPL_FLAG_SSSE3 = (1<<28)
 } OilImplFlag;
 
 #ifdef OIL_ENABLE_UNSTABLE_API
diff --git a/testsuite/instruction/check-instructions.pl b/testsuite/instruction/check-instructions.pl
index 877d030..7ed3aa7 100755
--- a/testsuite/instruction/check-instructions.pl
+++ b/testsuite/instruction/check-instructions.pl
@@ -48,6 +48,12 @@ sub get_flags
 		}elsif (grep { /^$opcode$/ } @sse2_list) {
 			$exts->{"sse2"} = 1;
 			$debug && print "  $opcode: sse2\n";
+		}elsif (grep { /^$opcode$/ } @sse3_list) {
+			$exts->{"sse3"} = 1;
+			$debug && print "  $opcode: sse3\n";
+		}elsif (grep { /^$opcode$/ } @ssse3_list) {
+			$exts->{"ssse3"} = 1;
+			$debug && print "  $opcode: ssse3\n";
 		}else {
 			print "FIXME:\t\"$opcode\",\n";
 			$error = 1;
@@ -513,6 +519,39 @@ sub check
 	"mfence",
 );
 
+ at sse3_list = (
+	"addsubpd",
+	"addsubps",
+	"haddpd",
+	"haddps",
+	"hsubpd",
+	"hsubps",
+	"lddqu",
+	"movddup",
+	"movshdup",
+	"movsldup",
+	"fisttp"
+);
+
+ at ssse3_list = (
+	"psignb",
+	"psignw",
+	"psignd",
+	"pabsb",
+	"pabsw",
+	"pabsd",
+	"palignr",
+	"pshufb",
+	"pmulhrsw",
+	"pmaddubsw",
+	"phsubw",
+	"phsubd",
+	"phsubsw",
+	"phaddw",
+	"phaddd",
+	"phaddsw"
+);
+
 #@clflush_list = (
 #	"clflush",
 #);
diff --git a/testsuite/instruction/list-impls.c b/testsuite/instruction/list-impls.c
index 02e79d1..a8cc7c2 100644
--- a/testsuite/instruction/list-impls.c
+++ b/testsuite/instruction/list-impls.c
@@ -69,6 +69,8 @@ main (int argc, char *argv[])
       if (flags & OIL_IMPL_FLAG_MMXEXT) printf(" mmxext");
       if (flags & OIL_IMPL_FLAG_SSE) printf(" sse");
       if (flags & OIL_IMPL_FLAG_SSE2) printf(" sse2");
+      if (flags & OIL_IMPL_FLAG_SSE3) printf(" sse3");
+      if (flags & OIL_IMPL_FLAG_SSSE3) printf(" ssse3");
       if (flags & OIL_IMPL_FLAG_ALTIVEC) printf(" altivec");
       printf("\n");
     }


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