[Libreoffice-commits] core.git: external/nss

[Stephan Bergmann]

 external/nss/UnpackedTarball_nss.mk  |    1 
 external/nss/ubsan-alignment.patch.0 |   40 +++++++++++++++++++++++++++++++++++
 2 files changed, 41 insertions(+)

New commits:
commit 3e27c437709e8f1e0df78826452f29330c68ebb5
Author: Stephan Bergmann <sbergman at redhat.com>
Date:   Mon Jul 4 15:47:08 2016 +0200

    Avoid -fsanitize=alignment in external/nss
    
    ...in a way that might be a performance issue, so include the patch only
    conditionally.
    
    Change-Id: I483a77d0d199c2dee00139fdd4fa41223192289c

diff --git a/external/nss/UnpackedTarball_nss.mk b/external/nss/UnpackedTarball_nss.mk
index 1a7ed13..e47b241 100644
--- a/external/nss/UnpackedTarball_nss.mk
+++ b/external/nss/UnpackedTarball_nss.mk
@@ -43,6 +43,7 @@ ifeq ($(COM_IS_CLANG),TRUE)
 ifneq ($(filter -fsanitize=%,$(CC)),)
 $(eval $(call gb_UnpackedTarball_add_patches,nss,\
 	external/nss/asan.patch.1 \
+	external/nss/ubsan-alignment.patch.0 \
 ))
 endif
 endif
diff --git a/external/nss/ubsan-alignment.patch.0 b/external/nss/ubsan-alignment.patch.0
new file mode 100644
index 0000000..4d13ffc
--- /dev/null
+++ b/external/nss/ubsan-alignment.patch.0
@@ -0,0 +1,40 @@
+--- nss/lib/freebl/md5.c
++++ nss/lib/freebl/md5.c
+@@ -443,7 +443,7 @@
+ 	/* Iterate over 64-byte chunks of the message. */
+ 	while (inputLen >= MD5_BUFFER_SIZE) {
+ #ifdef IS_LITTLE_ENDIAN
+-#ifdef NSS_X86_OR_X64
++#if 0
+ 		/* x86 can handle arithmetic on non-word-aligned buffers */
+ 		wBuf = (PRUint32 *)input;
+ #else
+--- nss/lib/freebl/sha_fast.c
++++ nss/lib/freebl/sha_fast.c
+@@ -16,7 +16,7 @@
+ #include "ssltrace.h"
+ #endif
+ 
+-static void shaCompress(volatile SHA_HW_t *X, const PRUint32 * datain);
++static void shaCompress(volatile SHA_HW_t *X, const unsigned char * datain);
+ 
+ #define W u.w
+ #define B u.b
+@@ -243,7 +243,7 @@
+  * code on AMD64.
+  */
+ static void 
+-shaCompress(volatile SHA_HW_t *X, const PRUint32 *inbuf) 
++shaCompress(volatile SHA_HW_t *X, const unsigned char *inbuf) 
+ {
+   register SHA_HW_t A, B, C, D, E;
+ 
+@@ -275,7 +275,7 @@
+ #define SHA_RND4(a,b,c,d,e,n) \
+   a = SHA_ROTL(b,5)+SHA_F4(c,d,e)+a+XW(n)+K3; c=SHA_ROTL(c,30) 
+ 
+-#define LOAD(n) XW(n) = SHA_HTONL(inbuf[n])
++#define LOAD(n) XW(n) = (((PRUint32)inbuf[4*n])<<24)|(((PRUint32)inbuf[4*n+1])<<16)|(((PRUint32)inbuf[4*n+2])<<8)|((PRUint32)inbuf[4*n+3])
+ 
+   A = XH(0);
+   B = XH(1);