[Libva] [PATCH 4/4] add nv12->rgbx conversion in post-processing
Zhao Halley
halley.zhao at intel.com
Thu Jul 12 22:41:45 PDT 2012
---
src/i965_post_processing.c | 57 ++++++++++++++++++++++++++++++++++++++++++++
src/i965_post_processing.h | 3 +-
2 files changed, 59 insertions(+), 1 deletions(-)
diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
index 01d286b..2a90e0e 100755
--- a/src/i965_post_processing.c
+++ b/src/i965_post_processing.c
@@ -111,6 +111,10 @@ static const uint32_t pp_rgbx_load_save_nv12_gen5[][4] = {
#include "shaders/post_processing/gen5_6/rgbx_load_save_nv12.g4b.gen5"
};
+static const uint32_t pp_nv12_load_save_rgbx_gen5[][4] = {
+#include "shaders/post_processing/gen5_6/nv12_load_save_rgbx.g4b.gen5"
+};
+
static VAStatus pp_null_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
const struct i965_surface *src_surface,
const VARectangle *src_rect,
@@ -323,6 +327,18 @@ static struct pp_module pp_modules_gen5[] = {
pp_plx_load_save_plx_initialize,
},
+ {
+ {
+ "NV12_RGBX module",
+ PP_NV12_LOAD_SAVE_RGBX,
+ pp_nv12_load_save_rgbx_gen5,
+ sizeof(pp_nv12_load_save_rgbx_gen5),
+ NULL,
+ },
+
+ pp_plx_load_save_plx_initialize,
+ },
+
};
static const uint32_t pp_null_gen6[][4] = {
@@ -381,6 +397,10 @@ static const uint32_t pp_rgbx_load_save_nv12_gen6[][4] = {
#include "shaders/post_processing/gen5_6/rgbx_load_save_nv12.g6b"
};
+static const uint32_t pp_nv12_load_save_rgbx_gen6[][4] = {
+#include "shaders/post_processing/gen5_6/nv12_load_save_rgbx.g6b"
+};
+
static struct pp_module pp_modules_gen6[] = {
{
{
@@ -549,6 +569,17 @@ static struct pp_module pp_modules_gen6[] = {
pp_plx_load_save_plx_initialize,
},
+ {
+ {
+ "NV12_RGBX module",
+ PP_NV12_LOAD_SAVE_RGBX,
+ pp_nv12_load_save_rgbx_gen6,
+ sizeof(pp_nv12_load_save_rgbx_gen6),
+ NULL,
+ },
+
+ pp_plx_load_save_plx_initialize,
+ },
};
static const uint32_t pp_null_gen7[][4] = {
@@ -598,6 +629,8 @@ static const uint32_t pp_pa_load_save_pl3_gen7[][4] = {
};
static const uint32_t pp_rgbx_load_save_nv12_gen7[][4] = {
};
+static const uint32_t pp_nv12_load_save_rgbx_gen7[][4] = {
+};
static VAStatus gen7_pp_plx_avs_initialize(VADriverContextP ctx, struct i965_post_processing_context *pp_context,
const struct i965_surface *src_surface,
@@ -786,6 +819,18 @@ static struct pp_module pp_modules_gen7[] = {
pp_plx_load_save_plx_initialize,
},
+ {
+ {
+ "NV12_RGBX module",
+ PP_NV12_LOAD_SAVE_RGBX,
+ pp_nv12_load_save_rgbx_gen7,
+ sizeof(pp_nv12_load_save_rgbx_gen7),
+ NULL,
+ },
+
+ pp_plx_load_save_plx_initialize,
+ },
+
};
static int
@@ -4175,6 +4220,18 @@ i965_image_pl2_processing(VADriverContextP ctx,
dst_rect,
PP_NV12_LOAD_SAVE_PA,
NULL);
+ } else if (fourcc == VA_FOURCC('B', 'G', 'R', 'X') ||
+ fourcc == VA_FOURCC('B', 'G', 'R', 'A')) {
+ vaStatus = i965_post_processing_internal(ctx, i965->pp_context,
+ src_surface,
+ src_rect,
+ dst_surface,
+ dst_rect,
+ PP_NV12_LOAD_SAVE_RGBX,
+ NULL);
+ } else {
+ assert(0);
+ return VA_STATUS_ERROR_UNKNOWN;
}
intel_batchbuffer_flush(pp_context->batch);
diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h
index 64229e8..3a4f01e 100755
--- a/src/i965_post_processing.h
+++ b/src/i965_post_processing.h
@@ -52,9 +52,10 @@ enum
PP_PA_LOAD_SAVE_NV12,
PP_PA_LOAD_SAVE_PL3,
PP_RGBX_LOAD_SAVE_NV12,
+ PP_NV12_LOAD_SAVE_RGBX,
};
-#define NUM_PP_MODULES 14
+#define NUM_PP_MODULES 15
struct i965_post_processing_context;
--
1.7.4.1
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