[Libva] [PATCH 5/7] Enabling HSW avc encoding configuration
lizhong
zhong.li at intel.com
Mon Jul 28 23:40:05 PDT 2014
On 07/29/2014 08:54 AM, Zhao, Yakui wrote:
> On Mon, 2014-07-28 at 01:02 -0600, Li, Zhong wrote:
>> On 07/28/2014 02:32 PM, Zhao, Yakui wrote:
>>> On Thu, 2014-07-24 at 03:47 -0600, Zhong Li wrote:
>>>> Signed-off-by: Zhong Li <zhong.li at intel.com>
>>>> ---
>>>> src/gen75_vme.c | 22 ++++++----
>>>> src/shaders/vme/inter_frame_haswell.asm | 69 +++++++++++++++++++-----------
>>>> src/shaders/vme/inter_frame_haswell.g75b | 52 ++++++++++++++--------
>>>> src/shaders/vme/vme75.inc | 8 +++-
>>>> 4 files changed, 97 insertions(+), 54 deletions(-)
>>>>
>>>> diff --git a/src/gen75_vme.c b/src/gen75_vme.c
>>>> index e8527c3..576e91a 100644
>>>> --- a/src/gen75_vme.c
>>>> +++ b/src/gen75_vme.c
>>>> @@ -534,7 +534,7 @@ gen75_vme_fill_vme_batchbuffer(VADriverContextP ctx,
>>>>
>>>> /*inline data */
>>>> *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
>>>> - *command_ptr++ = ( (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
>>>> + *command_ptr++ = ((encoder_context->quality_level << 24) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
>>>>
>>>> i += 1;
>>>> }
>>>> @@ -578,14 +578,20 @@ static void gen75_vme_pipeline_programing(VADriverContextP ctx,
>>>> int kernel_shader;
>>>> bool allow_hwscore = true;
>>>> int s;
>>>> -
>>>> - for (s = 0; s < encode_state->num_slice_params_ext; s++) {
>>>> - pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
>>>> - if ((pSliceParameter->macroblock_address % width_in_mbs)) {
>>>> - allow_hwscore = false;
>>>> - break;
>>>> - }
>>>> + unsigned int is_low_quality = (encoder_context->quality_level == ENCODER_LOW_QUALITY);
>>>> +
>>>> + if (is_low_quality)
>>>> + allow_hwscore = false;
>>>> + else {
>>>> + for (s = 0; s < encode_state->num_slice_params_ext; s++) {
>>>> + pSliceParameter = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[s]->buffer;
>>>> + if ((pSliceParameter->macroblock_address % width_in_mbs)) {
>>>> + allow_hwscore = false;
>>>> + break;
>>>> + }
>>>> + }
>>>> }
>>>> +
>>>> if ((pSliceParameter->slice_type == SLICE_TYPE_I) ||
>>>> (pSliceParameter->slice_type == SLICE_TYPE_I)) {
>>>> kernel_shader = VME_INTRA_SHADER;
>>>> diff --git a/src/shaders/vme/inter_frame_haswell.asm b/src/shaders/vme/inter_frame_haswell.asm
>>>> index bcfd260..399125a 100644
>>>> --- a/src/shaders/vme/inter_frame_haswell.asm
>>>> +++ b/src/shaders/vme/inter_frame_haswell.asm
>>>> @@ -475,24 +475,58 @@ send (16)
>>>> {align1};
>>>>
>>>> /* IME search */
>>>> -mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */
>>>> -mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */
>>>> -
>>>> -mov (1) vme_m0.0<1>:UD vme_m0.8<0,1,0>:UD {align1};
>>>> +cmp.z.f0.0 (1) null<1>:uw quality_level_ub<0,1,0>:ub LOW_QUALITY_LEVEL:uw {align1};
>>> Although this is not wrong, it will be better that the and operation is
>>> firstly executed with the corresponding bit-masks. It can avoid that too
>>> many bits are wasted.
>> Thanks for your comments, but can you explain which bits are wasted? Do
>> you mean register bits ?
>> I use cmp because quality_level is not always 2^N, it may be random
>> value. I think cmp is convenient, and more robust than and.
> What I mean is that and operation is firstly executed and then followed
> by cmp. In such case it is enough to define several bits for the
> supported configurable level. The remaining bits can still be reserved
> for future use.
Ok, understand. I'll follow your suggestion. Thanks.
>
>>>> +(f0.0) jmpi (1) __low_quality_search;
>>>>
>>>> -add (1) vme_m0.0<1>:W vme_m0.0<0,1,0>:W -16:W {align1}; /* Reference = (x-16,y-12)-(x+32,y+28) */
>>>> -add (1) vme_m0.2<1>:W vme_m0.2<0,1,0>:W -12:W {align1};
>>>> +__high_quality_search:
>>>> +/* M3/M4 search path */
>>>> +mov (1) vme_msg_3.0<1>:UD 0x01010101:UD {align1};
>>>> +mov (1) vme_msg_3.4<1>:UD 0x10010101:UD {align1};
>>>> +mov (1) vme_msg_3.8<1>:UD 0x0F0F0F0F:UD {align1};
>>>> +mov (1) vme_msg_3.12<1>:UD 0x100F0F0F:UD {align1};
>>>> +mov (1) vme_msg_3.16<1>:UD 0x01010101:UD {align1};
>>>> +mov (1) vme_msg_3.20<1>:UD 0x10010101:UD {align1};
>>>> +mov (1) vme_msg_3.24<1>:UD 0x0F0F0F0F:UD {align1};
>>>> +mov (1) vme_msg_3.28<1>:UD 0x100F0F0F:UD {align1};
>>>> +mov (1) vme_msg_4.0<1>:UD 0x01010101:UD {align1};
>>>> +mov (1) vme_msg_4.4<1>:UD 0x10010101:UD {align1};
>>>> +mov (1) vme_msg_4.8<1>:UD 0x0F0F0F0F:UD {align1};
>>>> +mov (1) vme_msg_4.12<1>:UD 0x000F0F0F:UD {align1};
>>>> +mov (4) vme_msg_4.16<1>:UD 0x0:UD {align1};
>>>>
>>>> +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */
>>>> +mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */
>>>> mov (1) vme_m0.0<1>:W -16:W {align1};
>>>> mov (1) vme_m0.2<1>:W -12:W {align1};
>>>>
>>>> -mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1};
>>>> -
>>>> and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1};
>>>> (f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 12:w {align1};
>>>> and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1};
>>>> (f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 8:w {align1};
>>>> -
>>>> +
>>>> +jmpi (1) __vme_msg;
>>>> +
>>>> +__low_quality_search:
>>>> +/* M3/M4 search path */
>>>> +mov (1) vme_msg_3.0<1>:UD 0x10010101:UD {align1};
>>>> +mov (1) vme_msg_3.4<1>:UD 0x100F0F0F:UD {align1};
>>>> +mov (1) vme_msg_3.8<1>:UD 0x10010101:UD {align1};
>>>> +mov (1) vme_msg_3.12<1>:UD 0x000F0F0F:UD {align1};
>>>> +mov (4) vme_msg_3.16<1>:UD 0x0:UD {align1};
>>>> +mov (8) vme_msg_4.16<1>:UD 0x0:UD {align1};
>>>> +
>>>> +mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */
>>>> +mov (1) vme_m0.22<1>:UW MIN_REF_REGION_SIZE {align1}; /* Reference Width&Height, 32x32 */
>>>> +mov (1) vme_m0.0<1>:W -8:W {align1};
>>>> +mov (1) vme_m0.2<1>:W -8:W {align1};
>>>> +
>>>> +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1};
>>>> +(f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 4:w {align1};
>>>> +and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1};
>>>> +(f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 4:w {align1};
>>>> +
>>>> +__vme_msg:
>>>> +mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1};
>>>> add (2) vme_m0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1};
>>>> add (2) vme_m0.4<1>:w vme_m0.4<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1};
>>>> mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1};
>>>> @@ -507,23 +541,6 @@ mov (1) vme_m1.20<1>:ud mb_mvp_ref.0<0,1,0>:ud {align1};
>>>> mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1};
>>>>
>>>> mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1};
>>>> -/* M3/M4 search path */
>>>> -
>>>> -mov (1) vme_msg_3.0<1>:UD 0x01010101:UD {align1};
>>>> -mov (1) vme_msg_3.4<1>:UD 0x10010101:UD {align1};
>>>> -mov (1) vme_msg_3.8<1>:UD 0x0F0F0F0F:UD {align1};
>>>> -mov (1) vme_msg_3.12<1>:UD 0x100F0F0F:UD {align1};
>>>> -mov (1) vme_msg_3.16<1>:UD 0x01010101:UD {align1};
>>>> -mov (1) vme_msg_3.20<1>:UD 0x10010101:UD {align1};
>>>> -mov (1) vme_msg_3.24<1>:UD 0x0F0F0F0F:UD {align1};
>>>> -mov (1) vme_msg_3.28<1>:UD 0x100F0F0F:UD {align1};
>>>> -
>>>> -mov (1) vme_msg_4.0<1>:UD 0x01010101:UD {align1};
>>>> -mov (1) vme_msg_4.4<1>:UD 0x10010101:UD {align1};
>>>> -mov (1) vme_msg_4.8<1>:UD 0x0F0F0F0F:UD {align1};
>>>> -mov (1) vme_msg_4.12<1>:UD 0x000F0F0F:UD {align1};
>>>> -
>>>> -mov (4) vme_msg_4.16<1>:UD 0x0:UD {align1};
>>>>
>>>> send (8)
>>>> vme_msg_ind
>>>> diff --git a/src/shaders/vme/inter_frame_haswell.g75b b/src/shaders/vme/inter_frame_haswell.g75b
>>>> index 61551f9..1a60c51 100644
>>>> --- a/src/shaders/vme/inter_frame_haswell.g75b
>>>> +++ b/src/shaders/vme/inter_frame_haswell.g75b
>>>> @@ -145,13 +145,13 @@
>>>> { 0x00000001, 0x2fa401ad, 0x00000b04, 0x00000000 },
>>>> { 0x00000001, 0x2fa801ad, 0x00000b24, 0x00000000 },
>>>> { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 },
>>>> - { 0x00000020, 0x34001c00, 0x00001400, 0x00000850 },
>>>> + { 0x00000020, 0x34001c00, 0x00001400, 0x00000930 },
>>>> { 0x00000001, 0x2ac001ad, 0x00000fe4, 0x00000000 },
>>>> { 0x00000001, 0x2fa001ad, 0x00000ae6, 0x00000000 },
>>>> { 0x00000001, 0x2fa401ad, 0x00000b06, 0x00000000 },
>>>> { 0x00000001, 0x2fa801ad, 0x00000b26, 0x00000000 },
>>>> { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 },
>>>> - { 0x00000020, 0x34001c00, 0x00001400, 0x000007f0 },
>>>> + { 0x00000020, 0x34001c00, 0x00001400, 0x000008d0 },
>>>> { 0x00000001, 0x2ac201ad, 0x00000fe4, 0x00000000 },
>>>> { 0x0020000c, 0x2a803dad, 0x00450ac0, 0x00020002 },
>>>> { 0x00200040, 0x2a883dad, 0x00450a80, 0x00030003 },
>>>> @@ -192,18 +192,45 @@
>>>> { 0x00000001, 0x28380021, 0x0000019c, 0x00000000 },
>>>> { 0x00000001, 0x283c0021, 0x00000488, 0x00000000 },
>>>> { 0x0a800031, 0x20001cac, 0x00000800, 0x040a0203 },
>>>> + { 0x01000010, 0x20002e28, 0x000000a7, 0x00020002 },
>>>> + { 0x00010020, 0x34001c00, 0x00001400, 0x00000160 },
>>>> + { 0x00000001, 0x28600061, 0x00000000, 0x01010101 },
>>>> + { 0x00000001, 0x28640061, 0x00000000, 0x10010101 },
>>>> + { 0x00000001, 0x28680061, 0x00000000, 0x0f0f0f0f },
>>>> + { 0x00000001, 0x286c0061, 0x00000000, 0x100f0f0f },
>>>> + { 0x00000001, 0x28700061, 0x00000000, 0x01010101 },
>>>> + { 0x00000001, 0x28740061, 0x00000000, 0x10010101 },
>>>> + { 0x00000001, 0x28780061, 0x00000000, 0x0f0f0f0f },
>>>> + { 0x00000001, 0x287c0061, 0x00000000, 0x100f0f0f },
>>>> + { 0x00000001, 0x28800061, 0x00000000, 0x01010101 },
>>>> + { 0x00000001, 0x28840061, 0x00000000, 0x10010101 },
>>>> + { 0x00000001, 0x28880061, 0x00000000, 0x0f0f0f0f },
>>>> + { 0x00000001, 0x288c0061, 0x00000000, 0x000f0f0f },
>>>> + { 0x00400001, 0x28900061, 0x00000000, 0x00000000 },
>>>> { 0x00000001, 0x244c0061, 0x00000000, 0x00200000 },
>>>> { 0x00000001, 0x24560169, 0x00000000, 0x28302830 },
>>>> - { 0x00000001, 0x24400021, 0x00000448, 0x00000000 },
>>>> - { 0x00000040, 0x24403dad, 0x00000440, 0xfff0fff0 },
>>>> - { 0x00000040, 0x24423dad, 0x00000442, 0xfff4fff4 },
>>>> { 0x00000001, 0x244001ed, 0x00000000, 0xfff0fff0 },
>>>> { 0x00000001, 0x244201ed, 0x00000000, 0xfff4fff4 },
>>>> - { 0x00000001, 0x24440021, 0x00000440, 0x00000000 },
>>>> { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 },
>>>> { 0x00010040, 0x24403dad, 0x00000440, 0x000c000c },
>>>> { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 },
>>>> { 0x00010040, 0x24423dad, 0x00000442, 0x00080008 },
>>>> + { 0x00000020, 0x34001c00, 0x00001400, 0x000000e0 },
>>>> + { 0x00000001, 0x28600061, 0x00000000, 0x10010101 },
>>>> + { 0x00000001, 0x28640061, 0x00000000, 0x100f0f0f },
>>>> + { 0x00000001, 0x28680061, 0x00000000, 0x10010101 },
>>>> + { 0x00000001, 0x286c0061, 0x00000000, 0x000f0f0f },
>>>> + { 0x00400001, 0x28700061, 0x00000000, 0x00000000 },
>>>> + { 0x00600001, 0x28900061, 0x00000000, 0x00000000 },
>>>> + { 0x00000001, 0x244c0061, 0x00000000, 0x00200000 },
>>>> + { 0x00000001, 0x24560169, 0x00000000, 0x20202020 },
>>>> + { 0x00000001, 0x244001ed, 0x00000000, 0xfff8fff8 },
>>>> + { 0x00000001, 0x244201ed, 0x00000000, 0xfff8fff8 },
>>>> + { 0x01000005, 0x20002e28, 0x000000a5, 0x00600060 },
>>>> + { 0x00010040, 0x24403dad, 0x00000440, 0x00040004 },
>>>> + { 0x01000005, 0x20002e28, 0x000000a5, 0x00100010 },
>>>> + { 0x00010040, 0x24423dad, 0x00000442, 0x00040004 },
>>>> + { 0x00000001, 0x24440021, 0x00000440, 0x00000000 },
>>>> { 0x00200040, 0x244035ad, 0x00450440, 0x00450a90 },
>>>> { 0x00200040, 0x244435ad, 0x00450444, 0x00450a90 },
>>>> { 0x00600001, 0x28000021, 0x008d0440, 0x00000000 },
>>>> @@ -214,19 +241,6 @@
>>>> { 0x00000001, 0x24740021, 0x00000ac0, 0x00000000 },
>>>> { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 },
>>>> { 0x00600001, 0x28400021, 0x008d0560, 0x00000000 },
>>>> - { 0x00000001, 0x28600061, 0x00000000, 0x01010101 },
>>>> - { 0x00000001, 0x28640061, 0x00000000, 0x10010101 },
>>>> - { 0x00000001, 0x28680061, 0x00000000, 0x0f0f0f0f },
>>>> - { 0x00000001, 0x286c0061, 0x00000000, 0x100f0f0f },
>>>> - { 0x00000001, 0x28700061, 0x00000000, 0x01010101 },
>>>> - { 0x00000001, 0x28740061, 0x00000000, 0x10010101 },
>>>> - { 0x00000001, 0x28780061, 0x00000000, 0x0f0f0f0f },
>>>> - { 0x00000001, 0x287c0061, 0x00000000, 0x100f0f0f },
>>>> - { 0x00000001, 0x28800061, 0x00000000, 0x01010101 },
>>>> - { 0x00000001, 0x28840061, 0x00000000, 0x10010101 },
>>>> - { 0x00000001, 0x28880061, 0x00000000, 0x0f0f0f0f },
>>>> - { 0x00000001, 0x288c0061, 0x00000000, 0x000f0f0f },
>>>> - { 0x00400001, 0x28900061, 0x00000000, 0x00000000 },
>>>> { 0x08600031, 0x21801ca1, 0x00000800, 0x0a784000 },
>>>> { 0x00000001, 0x25740061, 0x00000000, 0x00000000 },
>>>> { 0x00000001, 0x25750231, 0x00000199, 0x00000000 },
>>>> diff --git a/src/shaders/vme/vme75.inc b/src/shaders/vme/vme75.inc
>>>> index be49056..82055db 100644
>>>> --- a/src/shaders/vme/vme75.inc
>>>> +++ b/src/shaders/vme/vme75.inc
>>>> @@ -59,6 +59,8 @@ define(`SEARCH_CTRL_DUAL_RECORD', `0x00000300')
>>>> define(`SEARCH_CTRL_DUAL_REFERENCE', `0x00000700')
>>>>
>>>> define(`REF_REGION_SIZE', `0x2830:UW')
>>>> +define(`MIN_REF_REGION_SIZE', `0x2020:UW')
>>>> +define(`DREF_REGION_SIZE', `0x2020:UW')
>>>>
>>>> define(`BI_SUB_MB_PART_MASK', `0x0c000000')
>>>> define(`MAX_NUM_MV', `0x00000020')
>>>> @@ -133,6 +135,7 @@ define(`orig_y_ub', `inline_reg0.1')
>>>> define(`transform_8x8_ub', `inline_reg0.4')
>>>> define(`input_mb_intra_ub', `inline_reg0.5')
>>>> define(`num_macroblocks', `inline_reg0.6')
>>>> +define(`quality_level_ub', `inline_reg0.7')
>>>>
>>>> /*
>>>> * GRF 6~11 -- reserved
>>>> @@ -311,7 +314,6 @@ define(`mb_mv3', `r96')
>>>> define(`mb_ref', `r97')
>>>> define(`mb_ref_win', `r84')
>>>>
>>>> -define(`DREF_REGION_SIZE', `0x2020:UW')
>>>> define(`PRED_L0', `0x0':uw)
>>>> define(`PRED_L1', `0x1':uw)
>>>> define(`PRED_BI', `0x2':uw)
>>>> @@ -337,3 +339,7 @@ define(`INTER_8X16MODE', `0x02')
>>>> define(`OBR_MESSAGE_FENCE', `7')
>>>> define(`OBR_MF_NOCOMMIT', `0')
>>>> define(`OBR_MF_COMMIT', `0x20')
>>>> +
>>>> +define(`DEFAULT_QUALITY_LEVEL', `0x00')
>>>> +define(`HIGH_QUALITY_LEVEL', `0x01')
>>>> +define(`LOW_QUALITY_LEVEL', `0x02')
>>>
>>>
>
>
>
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