[Libva] [PATCH libva-intel-driver 5/6] Use the XXX_post_processing as callback function for post-processing

[yakui.zhao at intel.com]

From: Zhao Yakui <yakui.zhao at intel.com>

Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
---
 src/i965_post_processing.c | 21 +++++++++++++--------
 src/i965_post_processing.h |  9 +++++++++
 2 files changed, 22 insertions(+), 8 deletions(-)

diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c
index c37c203..9ea1955 100755
--- a/src/i965_post_processing.c
+++ b/src/i965_post_processing.c
@@ -5893,14 +5893,15 @@ i965_post_processing_internal(
     VAStatus va_status;
     struct i965_driver_data *i965 = i965_driver_data(ctx);
 
-    if (IS_GEN8(i965->intel.device_id))
-        va_status = gen8_post_processing(ctx, pp_context, src_surface, src_rect, dst_surface, dst_rect, pp_index, filter_param);
-    else if (IS_GEN6(i965->intel.device_id) ||
-        IS_GEN7(i965->intel.device_id))
-        va_status = gen6_post_processing(ctx, pp_context, src_surface, src_rect, dst_surface, dst_rect, pp_index, filter_param);
-    else
-        va_status = ironlake_post_processing(ctx, pp_context, src_surface, src_rect, dst_surface, dst_rect, pp_index, filter_param);
-    
+    if (pp_context && pp_context->intel_post_processing) {
+        va_status = (pp_context->intel_post_processing)(ctx, pp_context,
+                          src_surface, src_rect,
+                          dst_surface, dst_rect,
+                          pp_index, filter_param);
+    } else {
+        va_status = VA_STATUS_ERROR_UNIMPLEMENTED;
+    }
+
     return va_status;
 }
 
@@ -6638,6 +6639,8 @@ gen8_post_processing_context_init(VADriverContextP ctx,
 	pp_context->vfe_gpu_state.curbe_allocation_size = VPP_CURBE_ALLOCATION_SIZE;
     }
 
+    pp_context->intel_post_processing = gen8_post_processing;
+
     assert(NUM_PP_MODULES == ARRAY_ELEMS(pp_modules_gen8));
 
     if (IS_GEN8(i965->intel.device_id))
@@ -6732,12 +6735,14 @@ i965_post_processing_context_init(VADriverContextP ctx,
             pp_context->urb.num_vfe_entries * pp_context->urb.size_vfe_entry;
 	assert(pp_context->urb.cs_start +
 	    pp_context->urb.num_cs_entries * pp_context->urb.size_cs_entry <= URB_SIZE((&i965->intel)));
+        pp_context->intel_post_processing = ironlake_post_processing;
     } else {
 	pp_context->vfe_gpu_state.max_num_threads = 60;
 	pp_context->vfe_gpu_state.num_urb_entries = 59;
 	pp_context->vfe_gpu_state.gpgpu_mode = 0;
 	pp_context->vfe_gpu_state.urb_entry_size = 16 - 1;
 	pp_context->vfe_gpu_state.curbe_allocation_size = VPP_CURBE_ALLOCATION_SIZE;
+        pp_context->intel_post_processing = gen6_post_processing;
     }
     
 
diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h
index bbf64c7..f5145fc 100755
--- a/src/i965_post_processing.h
+++ b/src/i965_post_processing.h
@@ -540,6 +540,15 @@ struct i965_post_processing_context
     int idrt_size;
     unsigned int curbe_offset;
     int curbe_size;
+
+    VAStatus (*intel_post_processing)(VADriverContextP   ctx,
+				struct i965_post_processing_context *pp_context,
+				const struct i965_surface *src_surface,
+				const VARectangle *src_rect,
+				struct i965_surface *dst_surface,
+				const VARectangle *dst_rect,
+				int   pp_index,
+				void * filter_param);
 };
 
 struct i965_proc_context
-- 
1.8.2-rc2