[Libva] [PATCH] H264_Encoding: Fix the incorrect Qp setting under CBR when slice_header is passed

Zhao Yakui yakui.zhao at intel.com
Mon Sep 1 00:50:20 PDT 2014


Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
Tested-by: Sreerenj Balachandran <sreerenj.balachandran at intel.com>
---
 src/gen6_mfc.c  |   17 +++++++++++++----
 src/gen75_mfc.c |   16 ++++++++++++----
 src/gen8_mfc.c  |   17 ++++++++++++-----
 3 files changed, 37 insertions(+), 13 deletions(-)

diff --git a/src/gen6_mfc.c b/src/gen6_mfc.c
index 30cdb66..a52ba6e 100644
--- a/src/gen6_mfc.c
+++ b/src/gen6_mfc.c
@@ -842,11 +842,15 @@ gen6_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
     int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
     int is_intra = slice_type == SLICE_TYPE_I;
     int is_low_quality = (encoder_context->quality_level == ENCODER_LOW_QUALITY);
+    int qp_slice;
 
+    qp_slice = qp;
     if (rate_control_mode == VA_RC_CBR) {
         qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
-        if (encode_state->slice_header_index[slice_index] == 0)
+        if (encode_state->slice_header_index[slice_index] == 0) {
             pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+            qp_slice = qp;
+        }
     }
 
     /* only support for 8-bit pixel bit-depth */
@@ -859,7 +863,7 @@ gen6_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
                              pPicParameter,
                              pSliceParameter,
                              encode_state, encoder_context,
-                             (rate_control_mode == VA_RC_CBR), qp, slice_batch);
+                             (rate_control_mode == VA_RC_CBR), qp_slice, slice_batch);
 
     if ( slice_index == 0) 
         intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch);
@@ -1238,11 +1242,16 @@ gen6_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
     int old_used = intel_batchbuffer_used_size(slice_batch), used;
     unsigned short head_size, tail_size;
     int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
+    int qp_slice;
 
+    qp_slice = qp;
     if (rate_control_mode == VA_RC_CBR) {
         qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
-        if (encode_state->slice_header_index[slice_index] == 0)
+        if (encode_state->slice_header_index[slice_index] == 0) {
             pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+            /* Use the adjusted qp when slice_header is generated by driver */
+            qp_slice = qp;
+        }
     }
 
     /* only support for 8-bit pixel bit-depth */
@@ -1258,7 +1267,7 @@ gen6_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
                              encode_state,
                              encoder_context,
                              (rate_control_mode == VA_RC_CBR),
-                             qp,
+                             qp_slice,
                              slice_batch);
 
     if (slice_index == 0)
diff --git a/src/gen75_mfc.c b/src/gen75_mfc.c
index 8f15aae..905ceaf 100644
--- a/src/gen75_mfc.c
+++ b/src/gen75_mfc.c
@@ -1169,11 +1169,15 @@ gen75_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
     unsigned int tail_data[] = { 0x0, 0x0 };
     int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
     int is_intra = slice_type == SLICE_TYPE_I;
+    int qp_slice;
 
+    qp_slice = qp;
     if (rate_control_mode == VA_RC_CBR) {
         qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
-        if (encode_state->slice_header_index[slice_index] == 0)
+        if (encode_state->slice_header_index[slice_index] == 0) {
             pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+            qp_slice = qp;
+        }
     }
 
     /* only support for 8-bit pixel bit-depth */
@@ -1186,7 +1190,7 @@ gen75_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
                               pPicParameter,
                               pSliceParameter,
                               encode_state, encoder_context,
-                              (rate_control_mode == VA_RC_CBR), qp, slice_batch);
+                              (rate_control_mode == VA_RC_CBR), qp_slice, slice_batch);
 
     if ( slice_index == 0)
           intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch);
@@ -1510,11 +1514,15 @@ gen75_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
     unsigned int tail_data[] = { 0x0, 0x0 };
     long head_offset;
     int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
+    int qp_slice;
 
+    qp_slice = qp;
     if (rate_control_mode == VA_RC_CBR) {
         qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
-        if (encode_state->slice_header_index[slice_index] == 0)
+        if (encode_state->slice_header_index[slice_index] == 0) {
             pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+            qp_slice = qp;
+        }
     }
 
     /* only support for 8-bit pixel bit-depth */
@@ -1529,7 +1537,7 @@ gen75_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
                               encode_state,
                               encoder_context,
                               (rate_control_mode == VA_RC_CBR),
-                              qp,
+                              qp_slice,
                               slice_batch);
 
     if (slice_index == 0)
diff --git a/src/gen8_mfc.c b/src/gen8_mfc.c
index 265b2db..fd7ece1 100644
--- a/src/gen8_mfc.c
+++ b/src/gen8_mfc.c
@@ -1032,12 +1032,15 @@ gen8_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
     unsigned int tail_data[] = { 0x0, 0x0 };
     int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
     int is_intra = slice_type == SLICE_TYPE_I;
+    int qp_slice;
 
-
+    qp_slice = qp;
     if (rate_control_mode == VA_RC_CBR) {
         qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
-        if (encode_state->slice_header_index[slice_index] == 0)
+        if (encode_state->slice_header_index[slice_index] == 0) {
             pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+            qp_slice = qp;
+        }
     }
 
     /* only support for 8-bit pixel bit-depth */
@@ -1050,7 +1053,7 @@ gen8_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
                                   pPicParameter,
                                   pSliceParameter,
                                   encode_state, encoder_context,
-                                  (rate_control_mode == VA_RC_CBR), qp, slice_batch);
+                                  (rate_control_mode == VA_RC_CBR), qp_slice, slice_batch);
 
         if ( slice_index == 0)
             intel_mfc_avc_pipeline_header_programing(ctx, encode_state, encoder_context, slice_batch);
@@ -1405,11 +1408,15 @@ gen8_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
     int old_used = intel_batchbuffer_used_size(slice_batch), used;
     unsigned short head_size, tail_size;
     int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
+    int qp_slice;
 
+    qp_slice = qp;
     if (rate_control_mode == VA_RC_CBR) {
         qp = mfc_context->bit_rate_control_context[slice_type].QpPrimeY;
-        if (encode_state->slice_header_index[slice_index] == 0)
+        if (encode_state->slice_header_index[slice_index] == 0) {
             pSliceParameter->slice_qp_delta = qp - pPicParameter->pic_init_qp;
+            qp_slice = qp;
+        }
     }
 
     /* only support for 8-bit pixel bit-depth */
@@ -1425,7 +1432,7 @@ gen8_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
                              encode_state,
                              encoder_context,
                              (rate_control_mode == VA_RC_CBR),
-                             qp,
+                             qp_slice,
                              slice_batch);
 
     if (slice_index == 0)
-- 
1.7.10.1



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