[Libva] [libva-intel-driver PATCH 01/10] Initial support for Broxton in the intel-driver
Xiang, Haihao
haihao.xiang at intel.com
Thu Dec 3 10:13:54 PST 2015
From: Sirisha Muppavarapu <sirisha.muppavarapu at intel.com>
Added PCIIDs, Device info and the relevant code.
Signed-off-by: Sirisha Muppavarapu <sirisha.muppavarapu at intel.com>
[Peng: disable MPEG-2 encoding on BXT]
Signed-off-by: peng.chen <peng.c.chen at intel.com>
---
src/i965_device_info.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++++++
src/i965_pciids.h | 3 +++
src/intel_driver.h | 1 +
3 files changed, 60 insertions(+)
diff --git a/src/i965_device_info.c b/src/i965_device_info.c
index d5b5cb8..a844374 100644
--- a/src/i965_device_info.c
+++ b/src/i965_device_info.c
@@ -359,6 +359,54 @@ static struct hw_codec_info skl_hw_codec_info = {
},
};
+
+static struct hw_codec_info bxt_hw_codec_info = {
+ .dec_hw_context_init = gen9_dec_hw_context_init,
+ .enc_hw_context_init = gen9_enc_hw_context_init,
+ .proc_hw_context_init = gen75_proc_context_init,
+ .render_init = gen9_render_init,
+ .post_processing_context_init = gen9_post_processing_context_init,
+
+ .max_width = 4096,
+ .max_height = 4096,
+ .min_linear_wpitch = 64,
+ .min_linear_hpitch = 16,
+
+ .h264_mvc_dec_profiles = (VA_PROFILE_MASK(H264StereoHigh) |
+ VA_PROFILE_MASK(H264MultiviewHigh)),
+ .h264_dec_chroma_formats = EXTRA_H264_DEC_CHROMA_FORMATS,
+ .jpeg_dec_chroma_formats = EXTRA_JPEG_DEC_CHROMA_FORMATS,
+ .jpeg_enc_chroma_formats = EXTRA_JPEG_ENC_CHROMA_FORMATS,
+
+ .has_mpeg2_decoding = 1,
+ .has_h264_decoding = 1,
+ .has_h264_encoding = 1,
+ .has_vc1_decoding = 1,
+ .has_jpeg_decoding = 1,
+ .has_jpeg_encoding = 1,
+ .has_vpp = 1,
+ .has_accelerated_getimage = 1,
+ .has_accelerated_putimage = 1,
+ .has_tiled_surface = 1,
+ .has_di_motion_adptive = 1,
+ .has_di_motion_compensated = 1,
+ .has_vp8_decoding = 1,
+ .has_vp8_encoding = 1,
+ .has_h264_mvc_encoding = 1,
+ .has_hevc_decoding = 1,
+ .has_hevc_encoding = 1,
+
+ .num_filters = 5,
+ .filters = {
+ { VAProcFilterNoiseReduction, I965_RING_VEBOX },
+ { VAProcFilterDeinterlacing, I965_RING_VEBOX },
+ { VAProcFilterSharpening, I965_RING_NULL },
+ { VAProcFilterColorBalance, I965_RING_VEBOX},
+ { VAProcFilterSkinToneEnhancement, I965_RING_VEBOX},
+ },
+};
+
+
struct hw_codec_info *
i965_get_codec_info(int devid)
{
@@ -487,6 +535,14 @@ static const struct intel_device_info skl_device_info = {
.max_wm_threads = 64, /* per PSD */
};
+static const struct intel_device_info bxt_device_info = {
+ .gen = 9,
+
+ .urb_size = 4096,
+ .max_wm_threads = 64, /* per PSD */
+ .is_broxton = 1,
+};
+
const struct intel_device_info *
i965_get_device_info(int devid)
{
diff --git a/src/i965_pciids.h b/src/i965_pciids.h
index 22a43b1..cf46b9e 100644
--- a/src/i965_pciids.h
+++ b/src/i965_pciids.h
@@ -155,3 +155,6 @@ CHIPSET(0x1932, skl, skl, "Intel(R) Skylake")
CHIPSET(0x193A, skl, skl, "Intel(R) Skylake")
CHIPSET(0x193B, skl, skl, "Intel(R) Skylake")
CHIPSET(0x193D, skl, skl, "Intel(R) Skylake")
+CHIPSET(0x0A84, bxt, bxt, "Intel(R) Broxton")
+CHIPSET(0x1A84, bxt, bxt, "Intel(R) Broxton")
+CHIPSET(0x5A84, bxt, bxt, "Intel(R) Broxton")
diff --git a/src/intel_driver.h b/src/intel_driver.h
index 3c20ce4..def5f9e 100644
--- a/src/intel_driver.h
+++ b/src/intel_driver.h
@@ -136,6 +136,7 @@ struct intel_device_info
unsigned int is_baytrail : 1; /* gen7 */
unsigned int is_haswell : 1; /* gen7 */
unsigned int is_cherryview : 1; /* gen8 */
+ unsigned int is_broxton : 1; /* gen9 */
};
struct intel_driver_data
--
1.9.1
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