[Libva] [PATCH] BDW+: disable SGVS

Zhao, Yakui yakui.zhao at intel.com
Tue Jan 13 18:58:34 PST 2015


On Tue, 2015-01-13 at 16:29 -0700, Charles, Daniel wrote:
> On Tue, Jan 13, 2015 at 2:29 PM, Joe Konno <joe.konno at linux.intel.com> wrote:
> > From: Joe Konno <joe.konno at intel.com>
> >
> > BDW introduces separate packets for controlling instancing and system
> > generated values (eg vertex id and instance id).  We don't use
> > instancing, but still need to disable sgvs to avoid undefined behaviour
> > when some other driver (mesa) uses it.
> >
> > Signed-off-by: Joe Konno <joe.konno at intel.com>
> > Signed-off-by: Kristian Høgsberg <krh at bitplanet.net>

LGTM. And the patch will be pushed.

> > ---
> >  src/gen8_render.c  | 4 ++++
> >  src/gen9_render.c  | 3 +++
> >  src/i965_defines.h | 2 ++
> >  3 files changed, 9 insertions(+)
> >
> > diff --git a/src/gen8_render.c b/src/gen8_render.c
> > index 8a8012d..c01d269 100644
> > --- a/src/gen8_render.c
> > +++ b/src/gen8_render.c
> > @@ -1001,6 +1001,10 @@ gen8_emit_vertex_element_state(VADriverContextP ctx)
> >         OUT_BATCH(batch, i);
> >         OUT_BATCH(batch, 0);
> >      }
> > +
> > +    /* Disable system-generated values. */
> > +    OUT_BATCH(batch, GEN8_3DSTATE_VF_SGVS | (2 - 2));
> > +    OUT_BATCH(batch, 0);
> >  }
> >
> >  static void
> > diff --git a/src/gen9_render.c b/src/gen9_render.c
> > index 8823d33..ee7a4db 100644
> > --- a/src/gen9_render.c
> > +++ b/src/gen9_render.c
> > @@ -936,6 +936,9 @@ gen9_emit_vertices(VADriverContextP ctx)
> >      OUT_BATCH(batch, 0);
> >      OUT_BATCH(batch, 0);
> >
> > +    OUT_BATCH(batch, GEN8_3DSTATE_VF_SGVS | (2 - 2));
> > +    OUT_BATCH(batch, 0);
> > +
> >      BEGIN_BATCH(batch, 7);
> >      OUT_BATCH(batch, CMD_3DPRIMITIVE | (7 - 2));
> >      OUT_BATCH(batch,
> > diff --git a/src/i965_defines.h b/src/i965_defines.h
> > index 949037e..aa5058f 100755
> > --- a/src/i965_defines.h
> > +++ b/src/i965_defines.h
> > @@ -746,6 +746,8 @@
> >  #define _3DPRIM_LINESTRIP_CONT_BF 0x14
> >  #define _3DPRIM_TRIFAN_NOSTIPPLE  0x15
> >
> > +#define GEN8_3DSTATE_VF_INSTANCING     CMD(3, 0, 0x49)
> > +#define GEN8_3DSTATE_VF_SGVS           CMD(3, 0, 0x4a)
> >  #define GEN8_3DSTATE_VF_TOPOLOGY       CMD(3, 0, 0x4b)
> >
> >  #define I965_TILEWALK_XMAJOR                 0
> 
> Thanks for the patch Joe.
> 
> Reviewed-by: Daniel Charles <daniel.charles at intel.com>
> 
> > --
> > 2.2.1
> >
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