[Libva] [PATCH v2 04/12] VP8 HWEnc: Add P frame encoding support
Zhong Li
zhong.li at intel.com
Tue Jan 13 21:03:35 PST 2015
Signed-off-by: Zhong Li <zhong.li at intel.com>
---
src/gen9_mfc.c | 87 ++--
src/gen9_vme.c | 2 +-
src/i965_encoder_utils.c | 49 +-
src/shaders/vme/Makefile.am | 6 +-
src/shaders/vme/vp8_inter_frame_gen9.asm | 740 +++++++++++++++++++++++++++++++
src/shaders/vme/vp8_inter_frame_gen9.g9a | 2 +
src/shaders/vme/vp8_inter_frame_gen9.g9b | 300 +++++++++++++
7 files changed, 1136 insertions(+), 50 deletions(-)
create mode 100644 src/shaders/vme/vp8_inter_frame_gen9.asm
create mode 100644 src/shaders/vme/vp8_inter_frame_gen9.g9a
create mode 100644 src/shaders/vme/vp8_inter_frame_gen9.g9b
diff --git a/src/gen9_mfc.c b/src/gen9_mfc.c
index 98a2c2e..2ea4bc7 100644
--- a/src/gen9_mfc.c
+++ b/src/gen9_mfc.c
@@ -174,6 +174,8 @@ gen9_mfc_ind_obj_base_addr_state(VADriverContextP ctx,
OUT_BCS_BATCH(batch, 0);
OUT_BCS_BATCH(batch, 0);
+ vme_size = vme_context->vme_output.size_block * vme_context->vme_output.num_blocks;
+
/* the DW4-5 is the MFX upper bound */
if (encoder_context->codec == CODEC_VP8) {
OUT_BCS_RELOC(batch,
@@ -181,19 +183,23 @@ gen9_mfc_ind_obj_base_addr_state(VADriverContextP ctx,
I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
mfc_context->mfc_indirect_pak_bse_object.end_offset);
OUT_BCS_BATCH(batch, 0);
+ /* the DW6-10 is for MFX Indirect MV Object Base Address */
+ OUT_BCS_BATCH(batch, 0);
+ OUT_BCS_BATCH(batch, 0);
+ OUT_BCS_BATCH(batch, 0);
+ OUT_BCS_BATCH(batch, 0);
+ OUT_BCS_BATCH(batch, 0);
} else {
OUT_BCS_BATCH(batch, 0);
OUT_BCS_BATCH(batch, 0);
+ /* the DW6-10 is for MFX Indirect MV Object Base Address */
+ OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
+ OUT_BCS_BATCH(batch, 0);
+ OUT_BCS_BATCH(batch, 0);
+ OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, vme_size);
+ OUT_BCS_BATCH(batch, 0);
}
- vme_size = vme_context->vme_output.size_block * vme_context->vme_output.num_blocks;
- /* the DW6-10 is for MFX Indirect MV Object Base Address */
- OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
- OUT_BCS_BATCH(batch, 0);
- OUT_BCS_BATCH(batch, 0);
- OUT_BCS_RELOC(batch, vme_context->vme_output.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, vme_size);
- OUT_BCS_BATCH(batch, 0);
-
/* the DW11-15 is for MFX IT-COFF. Not used on encoder */
OUT_BCS_BATCH(batch, 0);
OUT_BCS_BATCH(batch, 0);
@@ -2622,33 +2628,16 @@ intel_mfc_vp8_prepare(VADriverContextP ctx,
mfc_context->surface_state.w_pitch = obj_surface->width;
mfc_context->surface_state.h_pitch = obj_surface->height;
- /* forward reference */
- obj_surface = encode_state->reference_objects[0];
-
- if (obj_surface && obj_surface->bo) {
- mfc_context->reference_surfaces[0].bo = obj_surface->bo;
- dri_bo_reference(mfc_context->reference_surfaces[0].bo);
- } else
- mfc_context->reference_surfaces[0].bo = NULL;
-
- /* backward reference */
- obj_surface = encode_state->reference_objects[1];
-
- if (obj_surface && obj_surface->bo) {
- mfc_context->reference_surfaces[1].bo = obj_surface->bo;
- dri_bo_reference(mfc_context->reference_surfaces[1].bo);
- } else {
- mfc_context->reference_surfaces[1].bo = mfc_context->reference_surfaces[0].bo;
-
- if (mfc_context->reference_surfaces[1].bo)
- dri_bo_reference(mfc_context->reference_surfaces[1].bo);
- }
-
- for (i = 2; i < ARRAY_ELEMS(mfc_context->reference_surfaces); i++) {
- mfc_context->reference_surfaces[i].bo = mfc_context->reference_surfaces[i & 1].bo;
+ /* set vp8 reference frames */
+ for (i = 0; i < ARRAY_ELEMS(mfc_context->reference_surfaces); i++) {
+ obj_surface = encode_state->reference_objects[i];
- if (mfc_context->reference_surfaces[i].bo)
+ if (obj_surface && obj_surface->bo) {
+ mfc_context->reference_surfaces[i].bo = obj_surface->bo;
dri_bo_reference(mfc_context->reference_surfaces[i].bo);
+ } else {
+ mfc_context->reference_surfaces[i].bo = NULL;
+ }
}
/* input YUV surface */
@@ -2987,7 +2976,37 @@ gen9_mfc_vp8_pak_object_inter(VADriverContextP ctx,
int x, int y,
struct intel_batchbuffer *batch)
{
- /* Add it later */
+ struct gen6_vme_context *vme_context = encoder_context->vme_context;
+
+ if (batch == NULL)
+ batch = encoder_context->base.batch;
+
+ BEGIN_BCS_BATCH(batch, 7);
+
+ OUT_BCS_BATCH(batch, MFX_VP8_PAK_OBJECT | (7 - 2));
+ OUT_BCS_BATCH(batch,
+ (0 << 29) | /* enable inline mv data: disable */
+ 64);
+ OUT_BCS_BATCH(batch,
+ 0);
+ OUT_BCS_BATCH(batch,
+ (4 << 20) | /* mv format: inter */
+ (0 << 18) | /* Segment ID */
+ (0 << 17) | /* coeff clamp: disable */
+ (0 << 13) | /* intra mb flag: inter mb */
+ (0 << 11) | /* refer picture select: last frame */
+ (0 << 8) | /* mb type: 16x16 */
+ (0 << 4) | /* mb uv mode: dc_pred */
+ (0 << 2) | /* skip mb flag: disable */
+ 0);
+
+ OUT_BCS_BATCH(batch, (y << 16) | x);
+
+ /*zero mv*/
+ OUT_BCS_BATCH(batch, 0x88888888);
+ OUT_BCS_BATCH(batch, 0x88888888);
+
+ ADVANCE_BCS_BATCH(batch);
}
static void
diff --git a/src/gen9_vme.c b/src/gen9_vme.c
index 03df88c..dc9d512 100644
--- a/src/gen9_vme.c
+++ b/src/gen9_vme.c
@@ -125,7 +125,7 @@ static const uint32_t gen9_vme_vp8_intra_frame[][4] = {
};
static const uint32_t gen9_vme_vp8_inter_frame[][4] = {
-#include "shaders/vme/inter_frame_gen9.g9b"
+#include "shaders/vme/vp8_inter_frame_gen9.g9b"
};
static struct i965_kernel gen9_vme_vp8_kernels[] = {
diff --git a/src/i965_encoder_utils.c b/src/i965_encoder_utils.c
index f7cbb8f..2b53cc7 100644
--- a/src/i965_encoder_utils.c
+++ b/src/i965_encoder_utils.c
@@ -30,7 +30,7 @@
#include <va/va_enc_h264.h>
#include <va/va_enc_mpeg2.h>
#include <va/va_enc_vp8.h>
-
+#include <math.h>
#include "gen6_mfc.h"
#include "i965_encoder_utils.h"
@@ -586,17 +586,16 @@ void binarize_vp8_frame_header(VAEncSequenceParameterBufferVP8 *seq_param,
struct gen6_mfc_context *mfc_context)
{
avc_bitstream bs;
- int i;
+ int i, j;
int is_intra_frame = !pic_param->pic_flags.bits.frame_type;
int log2num = (int)log2(pic_param->pic_flags.bits.num_token_partitions);
- if (is_intra_frame) {
- pic_param->pic_flags.bits.loop_filter_adj_enable = 1;
- pic_param->pic_flags.bits.mb_no_coeff_skip = 1;
-
- pic_param->pic_flags.bits.forced_lf_adjustment = 1;
- pic_param->pic_flags.bits.refresh_entropy_probs = 1;
- }
+ /* modify picture paramters */
+ pic_param->pic_flags.bits.loop_filter_adj_enable = 1;
+ pic_param->pic_flags.bits.mb_no_coeff_skip = 1;
+ pic_param->pic_flags.bits.forced_lf_adjustment = 1;
+ pic_param->pic_flags.bits.refresh_entropy_probs = 1;
+ pic_param->pic_flags.bits.segmentation_enabled = 0;
avc_bitstream_start(&bs);
@@ -672,7 +671,17 @@ void binarize_vp8_frame_header(VAEncSequenceParameterBufferVP8 *seq_param,
binarize_qindex_delta(&bs, q_matrix->quantization_index_delta[i]);
if (!is_intra_frame) {
- /*put reference frames info*/
+ avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.refresh_golden_frame, 1);
+ avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.refresh_alternate_frame, 1);
+
+ if (!pic_param->pic_flags.bits.refresh_golden_frame)
+ avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.copy_buffer_to_golden, 2);
+
+ if (!pic_param->pic_flags.bits.refresh_alternate_frame)
+ avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.copy_buffer_to_alternate, 2);
+
+ avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.sign_bias_golden, 1);
+ avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.sign_bias_alternate, 1);
}
avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.refresh_entropy_probs, 1);
@@ -682,7 +691,7 @@ void binarize_vp8_frame_header(VAEncSequenceParameterBufferVP8 *seq_param,
mfc_context->vp8_state.frame_header_token_update_pos = bs.bit_offset;
- for (i =0; i < 4 * 8 * 3 * 11; i++)
+ for (i = 0; i < 4 * 8 * 3 * 11; i++)
avc_bitstream_put_ui(&bs, 0, 1); //don't update coeff_probs
avc_bitstream_put_ui(&bs, pic_param->pic_flags.bits.mb_no_coeff_skip, 1);
@@ -693,9 +702,25 @@ void binarize_vp8_frame_header(VAEncSequenceParameterBufferVP8 *seq_param,
avc_bitstream_put_ui(&bs, mfc_context->vp8_state.prob_intra, 8);
avc_bitstream_put_ui(&bs, mfc_context->vp8_state.prob_last, 8);
avc_bitstream_put_ui(&bs, mfc_context->vp8_state.prob_gf, 8);
+
+ avc_bitstream_put_ui(&bs, 1, 1); //y_mode_update_flag = 1
+ for (i = 0; i < 4; i++) {
+ avc_bitstream_put_ui(&bs, mfc_context->vp8_state.y_mode_probs[i], 8);
+ }
+
+ avc_bitstream_put_ui(&bs, 1, 1); //uv_mode_update_flag = 1
+ for (i = 0; i < 3; i++) {
+ avc_bitstream_put_ui(&bs, mfc_context->vp8_state.uv_mode_probs[i], 8);
+ }
mfc_context->vp8_state.frame_header_bin_mv_upate_pos = bs.bit_offset;
- /*add mode_probs*/
+
+ for (i = 0; i < 2 ; i++) {
+ for (j = 0; j < 19; j++) {
+ avc_bitstream_put_ui(&bs, 0, 1);
+ //avc_bitstream_put_ui(&bs, mfc_context->vp8_state.mv_probs[i][j], 7);
+ }
+ }
}
avc_bitstream_end(&bs);
diff --git a/src/shaders/vme/Makefile.am b/src/shaders/vme/Makefile.am
index 123378f..0883c16 100644
--- a/src/shaders/vme/Makefile.am
+++ b/src/shaders/vme/Makefile.am
@@ -2,7 +2,7 @@ VME_CORE = batchbuffer.asm intra_frame.asm inter_frame.asm
VME7_CORE = batchbuffer.asm intra_frame_ivb.asm inter_frame_ivb.asm inter_bframe_ivb.asm mpeg2_inter_ivb.asm
VME75_CORE = batchbuffer.asm intra_frame_haswell.asm inter_frame_haswell.asm inter_bframe_haswell.asm mpeg2_inter_haswell.asm
VME8_CORE = intra_frame_gen8.asm inter_frame_gen8.asm inter_bframe_gen8.asm
-VME9_CORE = $(VME8_CORE) vp8_intra_frame_gen9.asm
+VME9_CORE = $(VME8_CORE) vp8_intra_frame_gen9.asm vp8_inter_frame_gen9.asm
INTEL_G6B = batchbuffer.g6b intra_frame.g6b inter_frame.g6b
INTEL_G6A = batchbuffer.g6a intra_frame.g6a inter_frame.g6a
@@ -26,8 +26,8 @@ INTEL_GEN8_INC = vme8.inc vme75_mpeg2.inc
INTEL_GEN8_ASM = $(INTEL_G8A:%.g8a=%.gen8.asm)
-INTEL_G9B = intra_frame_gen9.g9b inter_frame_gen9.g9b inter_bframe_gen9.g9b mpeg2_inter_gen9.g9b vp8_intra_frame_gen9.g9b
-INTEL_G9A = intra_frame_gen9.g9a inter_frame_gen9.g9a inter_bframe_gen9.g9a mpeg2_inter_gen9.g9a vp8_intra_frame_gen9.g9a
+INTEL_G9B = intra_frame_gen9.g9b inter_frame_gen9.g9b inter_bframe_gen9.g9b mpeg2_inter_gen9.g9b vp8_intra_frame_gen9.g9b vp8_inter_frame_gen9.g9b
+INTEL_G9A = intra_frame_gen9.g9a inter_frame_gen9.g9a inter_bframe_gen9.g9a mpeg2_inter_gen9.g9a vp8_intra_frame_gen9.g9a vp8_inter_frame_gen9.g9a
INTEL_GEN9_INC = $(INTEL_GEN8_INC)
INTEL_GEN9_ASM = $(INTEL_G9A:%.g9a=%.gen9.asm)
diff --git a/src/shaders/vme/vp8_inter_frame_gen9.asm b/src/shaders/vme/vp8_inter_frame_gen9.asm
new file mode 100644
index 0000000..1f9da25
--- /dev/null
+++ b/src/shaders/vme/vp8_inter_frame_gen9.asm
@@ -0,0 +1,740 @@
+/*
+ * Copyright © 2014 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Zhao Yakui <yakui.zhao at intel.com>
+ * Xiang Haihao <haihao.xiang at intel.com>
+ * Li Zhong <zhong.li at intel.com>
+ *
+ */
+
+#define SAVE_RET add (1) RETURN_REG<1>:ud ip:ud 32:ud
+#define RETURN mov (1) ip:ud RETURN_REG<0,1,0>:ud
+
+/*
+ * __START
+ */
+__INTER_START:
+mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1};
+mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1};
+mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ;
+mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ;
+
+shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */
+add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */
+add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */
+mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1};
+mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */
+
+shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */
+add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */
+mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1};
+mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */
+
+shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */
+mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
+
+mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1};
+add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1};
+mul (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 24:UD {align1};
+mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
+
+/*
+ * Media Read Message -- fetch Luma neighbor edge pixels
+ */
+/* ROW */
+mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1};
+send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1};
+
+/* COL */
+mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1};
+send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1};
+
+/*
+ * Media Read Message -- fetch Chroma neighbor edge pixels
+ */
+/* ROW */
+shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16 , y * 8 */
+mul (1) read0_header.0<1>:D read0_header.0<0,1,0>:D 2:W {align1};
+add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */
+add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */
+mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1};
+send (8) msg_ind CHROMA_ROW<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1};
+
+/* COL */
+shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 3:UW {align1}; /* x * 16, y * 8 */
+mul (1) read1_header.0<1>:D read1_header.0<0,1,0>:D 2:W {align1};
+add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */
+mov (1) read1_header.8<1>:UD BLOCK_8X4 {align1};
+mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1};
+send (8) msg_ind CHROMA_COL<1>:UB null read(BIND_IDX_CBCR, 0, 0, 4) mlen 1 rlen 1 {align1};
+
+mov (8) mb_mvp_ref.0<1>:ud 0:ud {align1};
+mov (8) mb_ref_win.0<1>:ud 0:ud {align1};
+and.z.f0.0 (1) null:uw mb_hwdep<0,1,0>:uw 0x04:uw {align1};
+(f0.0) jmpi (1) __mb_hwdep_end;
+/* read back the data for MB A */
+/* the layout of MB result is: rx.0(Available). rx.4(MVa), rX.8(MVb), rX.16(Pred_L0 flag),
+* rX.18 (Pred_L1 flag), rX.20(Forward reference ID), rX.22(Backwared reference ID)
+*/
+mov (8) mba_result.0<1>:ud 0x0:ud {align1};
+mov (8) mbb_result.0<1>:ud 0x0:ud {align1};
+mov (8) mbc_result.0<1>:ud 0x0:ud {align1};
+mba_start:
+mov (8) mb_msg0.0<1>:ud 0:ud {align1};
+and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1};
+/* MB A doesn't exist. Zero MV. mba_flag is zero and ref ID = -1 */
+(f0.0) mov (2) mba_result.20<1>:w -1:w {align1};
+(f0.0) jmpi (1) mbb_start;
+mov (1) mba_result.0<1>:d MB_AVAIL {align1};
+mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1};
+add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w -1:w {align1};
+mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1};
+add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1};
+mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1};
+mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
+
+/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */
+send (16)
+ mb_ind
+ mb_wb.0<1>:ud
+ NULL
+ data_port(
+ OBR_CACHE_TYPE,
+ OBR_MESSAGE_TYPE,
+ OBR_CONTROL_4,
+ OBR_BIND_IDX,
+ OBR_WRITE_COMMIT_CATEGORY,
+ OBR_HEADER_PRESENT
+ )
+ mlen 1
+ rlen 2
+ {align1};
+
+/* TODO: RefID is required after multi-references are added */
+cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1};
+(f0.0) mov (2) mba_result.20<1>:w -1:w {align1};
+(f0.0) jmpi (1) mbb_start;
+
+add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1};
+/* Read MV for MB A */
+/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */
+send (16)
+ mb_ind
+ mb_mv0.0<1>:ud
+ NULL
+ data_port(
+ OBR_CACHE_TYPE,
+ OBR_MESSAGE_TYPE,
+ OBR_CONTROL_8,
+ OBR_BIND_IDX,
+ OBR_WRITE_COMMIT_CATEGORY,
+ OBR_HEADER_PRESENT
+ )
+ mlen 1
+ rlen 4
+ {align1};
+/* TODO: RefID is required after multi-references are added */
+/* MV */
+mov (2) mba_result.4<1>:ud mb_mv1.8<2,2,1>:ud {align1};
+mov (1) mba_result.16<1>:w MB_PRED_FLAG {align1};
+
+mbb_start:
+mov (8) mb_msg0.0<1>:ud 0:ud {align1};
+and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1};
+/* MB B doesn't exist. Zero MV. mba_flag is zero */
+/* If MB B doesn't exist, neither MB C nor D exists */
+(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1};
+(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1};
+(f0.0) jmpi (1) mb_mvp_start;
+mov (1) mbb_result.0<1>:d MB_AVAIL {align1};
+mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1};
+add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1};
+mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1};
+add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1};
+mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1};
+mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
+
+/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */
+send (16)
+ mb_ind
+ mb_wb.0<1>:ud
+ NULL
+ data_port(
+ OBR_CACHE_TYPE,
+ OBR_MESSAGE_TYPE,
+ OBR_CONTROL_4,
+ OBR_BIND_IDX,
+ OBR_WRITE_COMMIT_CATEGORY,
+ OBR_HEADER_PRESENT
+ )
+ mlen 1
+ rlen 2
+ {align1};
+
+/* TODO: RefID is required after multi-references are added */
+cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1};
+(f0.0) mov (2) mbb_result.20<1>:w -1:w {align1};
+(f0.0) jmpi (1) mbc_start;
+add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1};
+/* Read MV for MB B */
+/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */
+send (16)
+ mb_ind
+ mb_mv0.0<1>:ud
+ NULL
+ data_port(
+ OBR_CACHE_TYPE,
+ OBR_MESSAGE_TYPE,
+ OBR_CONTROL_8,
+ OBR_BIND_IDX,
+ OBR_WRITE_COMMIT_CATEGORY,
+ OBR_HEADER_PRESENT
+ )
+ mlen 1
+ rlen 4
+ {align1};
+/* TODO: RefID is required after multi-references are added */
+mov (2) mbb_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1};
+mov (1) mbb_result.16<1>:w MB_PRED_FLAG {align1};
+
+mbc_start:
+mov (8) mb_msg0.0<1>:ud 0:ud {align1};
+and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_C:uw {align1};
+/* MB C doesn't exist. Zero MV. mba_flag is zero */
+/* Based on h264 spec the MB D will be replaced if MB C doesn't exist */
+(f0.0) jmpi (1) mbd_start;
+mov (1) mbc_result.0<1>:d MB_AVAIL {align1};
+mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1};
+add (1) tmp_reg0.2<1>:w tmp_reg0.2<0,1,0>:w -1:w {align1};
+add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1};
+mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1};
+add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1};
+mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1};
+mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
+
+/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */
+send (16)
+ mb_ind
+ mb_wb.0<1>:ud
+ NULL
+ data_port(
+ OBR_CACHE_TYPE,
+ OBR_MESSAGE_TYPE,
+ OBR_CONTROL_4,
+ OBR_BIND_IDX,
+ OBR_WRITE_COMMIT_CATEGORY,
+ OBR_HEADER_PRESENT
+ )
+ mlen 1
+ rlen 2
+ {align1};
+
+/* TODO: RefID is required after multi-references are added */
+cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1};
+(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1};
+(f0.0) jmpi (1) mb_mvp_start;
+add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1};
+/* Read MV for MB C */
+/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */
+send (16)
+ mb_ind
+ mb_mv0.0<1>:ud
+ NULL
+ data_port(
+ OBR_CACHE_TYPE,
+ OBR_MESSAGE_TYPE,
+ OBR_CONTROL_8,
+ OBR_BIND_IDX,
+ OBR_WRITE_COMMIT_CATEGORY,
+ OBR_HEADER_PRESENT
+ )
+ mlen 1
+ rlen 4
+ {align1};
+/* TODO: RefID is required after multi-references are added */
+/* Forward MV */
+mov (2) mbc_result.4<1>:ud mb_mv2.16<2,2,1>:ud {align1};
+mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1};
+
+jmpi (1) mb_mvp_start;
+mbd_start:
+mov (8) mb_msg0.0<1>:ud 0:ud {align1};
+and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_D:uw {align1};
+(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1};
+(f0.0) jmpi (1) mb_mvp_start;
+mov (1) mbc_result.0<1>:d MB_AVAIL {align1};
+mov (2) tmp_reg0.0<1>:UW orig_xy_ub<2,2,1>:UB {align1};
+add (2) tmp_reg0.0<1>:w tmp_reg0.0<2,2,1>:w -1:w {align1};
+mul (1) mb_msg0.8<1>:UD w_in_mb_uw<0,1,0>:UW tmp_reg0.2<0,1,0>:UW {align1};
+add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD tmp_reg0.0<0,1,0>:uw {align1};
+mul (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:UD 24:UD {align1};
+mov (1) mb_msg0.20<1>:UB thread_id_ub {align1}; /* dispatch id */
+
+/* bind index 3, read 4 oword (64bytes), msg type: 0(OWord Block Read) */
+send (16)
+ mb_ind
+ mb_wb.0<1>:ud
+ NULL
+ data_port(
+ OBR_CACHE_TYPE,
+ OBR_MESSAGE_TYPE,
+ OBR_CONTROL_4,
+ OBR_BIND_IDX,
+ OBR_WRITE_COMMIT_CATEGORY,
+ OBR_HEADER_PRESENT
+ )
+ mlen 1
+ rlen 2
+ {align1};
+
+cmp.l.f0.0 (1) null:w mb_intra_wb.16<0,1,0>:uw mb_inter_wb.8<0,1,0>:uw {align1};
+(f0.0) mov (2) mbc_result.20<1>:w -1:w {align1};
+(f0.0) jmpi (1) mb_mvp_start;
+
+add (1) mb_msg0.8<1>:UD mb_msg0.8<0,1,0>:ud 3:ud {align1};
+/* Read MV for MB D */
+/* bind index 3, read 8 oword (128bytes), msg type: 0(OWord Block Read) */
+send (16)
+ mb_ind
+ mb_mv0.0<1>:ub
+ NULL
+ data_port(
+ OBR_CACHE_TYPE,
+ OBR_MESSAGE_TYPE,
+ OBR_CONTROL_8,
+ OBR_BIND_IDX,
+ OBR_WRITE_COMMIT_CATEGORY,
+ OBR_HEADER_PRESENT
+ )
+ mlen 1
+ rlen 4
+ {align1};
+
+/* TODO: RefID is required after multi-references are added */
+
+/* Forward MV */
+mov (2) mbc_result.4<1>:ud mb_mv3.24<2,2,1>:ud {align1};
+mov (1) mbc_result.16<1>:w MB_PRED_FLAG {align1};
+
+mb_mvp_start:
+/*TODO: Add the skip prediction */
+/* Check whether both MB B and C are inavailable */
+add (1) tmp_reg0.0<1>:d mbb_result.0<0,1,0>:d mbc_result.0<0,1,0>:d {align1};
+cmp.z.f0.0 (1) null:d tmp_reg0.0<0,1,0>:d 0:d {align1};
+(-f0.0) jmpi (1) mb_median_start;
+cmp.nz.f0.0 (1) null:d mba_result.0<0,1,0>:d 0:d {align1};
+(f0.0) mov (1) mbb_result.4<1>:ud mba_result.4<0,1,0>:ud {align1};
+(f0.0) mov (1) mbc_result.4<1>:ud mba_result.4<0,1,0>:ud {align1};
+(f0.0) mov (1) mbb_result.20<1>:uw mba_result.20<0,1,0>:uw {align1};
+(f0.0) mov (1) mbc_result.20<1>:uw mba_result.20<0,1,0>:uw {align1};
+(f0.0) mov (1) mb_mvp_ref.0<1>:ud mba_result.4<0,1,0>:ud {align1};
+(-f0.0) mov (1) mb_mvp_ref.0<1>:ud 0:ud {align1};
+jmpi (1) __mb_hwdep_end;
+
+mb_median_start:
+/* check whether only one neighbour MB has the same ref ID with the current MB */
+mov (8) tmp_reg0.0<1>:ud 0:ud {align1};
+cmp.z.f0.0 (1) null:d mba_result.20<0,1,0>:w 0:w {align1};
+(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1};
+(f0.0) mov (1) tmp_reg0.4<1>:ud mba_result.4<0,1,0>:ud {align1};
+cmp.z.f0.0 (1) null:d mbb_result.20<0,1,0>:w 0:w {align1};
+(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1};
+(f0.0) mov (1) tmp_reg0.4<1>:ud mbb_result.4<0,1,0>:ud {align1};
+cmp.z.f0.0 (1) null:d mbc_result.20<0,1,0>:w 0:w {align1};
+(f0.0) add (1) tmp_reg0.0<1>:w tmp_reg0.0<0,1,0>:w 1:w {align1};
+(f0.0) mov (1) tmp_reg0.4<1>:ud mbc_result.4<0,1,0>:ud {align1};
+cmp.e.f0.0 (1) null:d tmp_reg0.0<0,1,0>:w 1:w {align1};
+(f0.0) mov (1) mb_mvp_ref.0<1>:ud tmp_reg0.4<0,1,0>:ud {align1};
+(f0.0) jmpi (1) __mb_hwdep_end;
+
+mov (1) INPUT_ARG0.0<1>:w mba_result.4<0,1,0>:w {align1};
+mov (1) INPUT_ARG0.4<1>:w mbb_result.4<0,1,0>:w {align1};
+mov (1) INPUT_ARG0.8<1>:w mbc_result.4<0,1,0>:w {align1};
+SAVE_RET {align1};
+ jmpi (1) word_imedian;
+mov (1) mb_mvp_ref.0<1>:w RET_ARG<0,1,0>:w {align1};
+mov (1) INPUT_ARG0.0<1>:w mba_result.6<0,1,0>:w {align1};
+mov (1) INPUT_ARG0.4<1>:w mbb_result.6<0,1,0>:w {align1};
+mov (1) INPUT_ARG0.8<1>:w mbc_result.6<0,1,0>:w {align1};
+SAVE_RET {align1};
+jmpi (1) word_imedian;
+mov (1) mb_mvp_ref.2<1>:w RET_ARG<0,1,0>:w {align1};
+
+__mb_hwdep_end:
+asr (2) mb_ref_win.0<1>:w mb_mvp_ref.0<2,2,1>:w 2:w {align1};
+add (2) mb_ref_win.8<1>:w mb_ref_win.0<2,2,1>:w 3:w {align1};
+and (2) mb_ref_win.16<1>:uw mb_ref_win.8<2,2,1>:uw 0xFFFC:uw {align1};
+/* m2, get the MV/Mb cost passed from constant buffer when
+spawning thread by MEDIA_OBJECT */
+mov (8) vme_m2<1>:UD r1.0<8,8,1>:UD {align1};
+
+mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1};
+
+/* m3 FWD/BWD cost center*/
+mov (8) vme_msg_3<1>:UD 0x0:UD {align1};
+
+/* m4 skip center*/
+mov (8) vme_msg_4<1>:UD 0x0:UD {align1};
+
+/* m5 */
+mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1};
+and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1};
+mov (8) vme_msg_5<1>:UD INEP_ROW.0<8,8,1>:UD {align1};
+
+
+/* Use the Luma mode */
+mov (1) tmp_reg0.0<1>:UW LUMA_INTRA_MODE:UW {align1};
+mov (1) vme_msg_5.5<1>:UB tmp_reg0.0<0,1,0>:UB {align1};
+
+/* m6 */
+mov (8) vme_msg_6<1>:UD 0x0:UD {align1};
+mov (16) vme_msg_6.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1};
+mov (1) vme_msg_6.16<1>:UD INTRA_PREDICTORE_MODE {align1};
+
+/* the penalty for Intra mode */
+mov (1) vme_msg_6.28<1>:UD 0x010101:UD {align1};
+mov (1) vme_msg_6.20<1>:UW CHROMA_ROW.6<0,1,0>:UW {align1};
+
+
+/* m7 */
+
+mov (4) vme_msg_7.16<1>:UD CHROMA_ROW.8<4,4,1>:UD {align1};
+mov (8) vme_msg_7.0<1>:UW CHROMA_COL.2<16,8,2>:UW {align1};
+
+/*
+ * SIC VME message
+ */
+
+/* m1 */
+mov (1) intra_flag<1>:UW 0x0:UW {align1};
+mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE {align1}; /* vp8 don't support intra_8x8 mode*/
+
+/* assign MB intra struct from the thread payload*/
+mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1};
+
+/* Disable DC HAAR component when calculating HARR SATD block */
+mov (1) tmp_reg0.0<1>:UW DC_HARR_DISABLE:UW {align1};
+mov (1) vme_m1.30<1>:UB tmp_reg0.0<0,1,0>:UB {align1};
+mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1};
+
+/* m0 */
+mov (1) vme_m0.12<1>:UD INTRA_SAD_HAAR:UD {align1}; /* 16x16 Source, Intra_harr */
+mov (1) vme_m0.15<1>:UB SUB_PART_8x4_DISABLE + SUB_PART_4x8_DISABLE {align1}; /* vp8 don't support 8x4 and 4x8 partion */
+mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1};
+
+/* after verification it will be passed by using payload */
+send (8)
+ vme_msg_ind
+ vme_wb<1>:UD
+ null
+ cre(
+ BIND_IDX_VME,
+ VME_SIC_MESSAGE_TYPE
+ )
+ mlen sic_vme_msg_length
+ rlen vme_wb_length
+ {align1};
+/*
+ * Oword Block Write message
+ */
+mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1};
+
+mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1};
+mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1};
+mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1};
+mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1};
+
+/* Distortion, Intra (17-16), */
+mov (1) msg_reg1.16<1>:UW vme_wb.12<0,1,0>:UW {align1};
+
+mov (1) msg_reg1.20<1>:UD vme_wb.8<0,1,0>:UD {align1};
+/* VME clock counts */
+mov (1) msg_reg1.24<1>:UD vme_wb.28<0,1,0>:UD {align1};
+
+mov (1) msg_reg1.28<1>:UD obw_m0.8<0,1,0>:UD {align1};
+
+/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */
+send (16)
+ msg_ind
+ obw_wb
+ null
+ data_port(
+ OBW_CACHE_TYPE,
+ OBW_MESSAGE_TYPE,
+ OBW_CONTROL_2,
+ OBW_BIND_IDX,
+ OBW_WRITE_COMMIT_CATEGORY,
+ OBW_HEADER_PRESENT
+ )
+ mlen 2
+ rlen obw_wb_length
+ {align1};
+
+/* IME search */
+mov (1) vme_m0.12<1>:UD SEARCH_CTRL_SINGLE + INTER_PART_MASK + INTER_SAD_HAAR:UD {align1}; /* 16x16 Source, harr */
+mov (1) vme_m0.22<1>:UW REF_REGION_SIZE {align1}; /* Reference Width&Height, 48x40 */
+
+mov (1) vme_m0.0<1>:UD vme_m0.8<0,1,0>:UD {align1};
+
+add (1) vme_m0.0<1>:W vme_m0.0<0,1,0>:W -16:W {align1}; /* Reference = (x-16,y-12)-(x+32,y+28) */
+add (1) vme_m0.2<1>:W vme_m0.2<0,1,0>:W -12:W {align1};
+
+mov (1) vme_m0.0<1>:W -16:W {align1};
+mov (1) vme_m0.2<1>:W -12:W {align1};
+
+mov (1) vme_m0.4<1>:UD vme_m0.0<0,1,0>:UD {align1};
+
+and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_AE:uw {align1};
+(f0.0) add (1) vme_m0.0<1>:w vme_m0.0<0,1,0>:w 12:w {align1};
+and.z.f0.0 (1) null:uw input_mb_intra_ub<0,1,0>:ub INTRA_PRED_AVAIL_FLAG_B:uw {align1};
+(f0.0) add (1) vme_m0.2<1>:w vme_m0.2<0,1,0>:w 8:w {align1};
+
+add (2) vme_m0.0<1>:w vme_m0.0<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1};
+add (2) vme_m0.4<1>:w vme_m0.4<2,2,1>:w mb_ref_win.16<2,2,1>:w {align1};
+mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1};
+
+mov (1) vme_m1.0<1>:UD ADAPTIVE_SEARCH_ENABLE:ud {align1} ;
+/* the Max MV number is passed by constant buffer */
+mov (1) vme_m1.4<1>:UB r4.28<0,1,0>:UB {align1};
+mov (1) vme_m1.8<1>:UD START_CENTER + SEARCH_PATH_LEN:UD {align1};
+mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1};
+
+/* Setup the Cost center */
+/* currently four 8x8 share the same cost center */
+mov (4) vme_m3.0<2>:ud mb_mvp_ref.0<0,1,0>:ud {align1};
+mov (4) vme_m3.4<2>:ud mb_mvp_ref.0<0,1,0>:ud {align1};
+
+mov (8) vme_msg_3<1>:UD vme_m3.0<8,8,1>:UD {align1};
+mov (8) vme_msg_2<1>:UD vme_m2.0<8,8,1>:UD {align1};
+
+/* M4/M5 search path */
+mov (1) vme_msg_4.0<1>:UD 0x01010101:UD {align1};
+mov (1) vme_msg_4.4<1>:UD 0x10010101:UD {align1};
+mov (1) vme_msg_4.8<1>:UD 0x0F0F0F0F:UD {align1};
+mov (1) vme_msg_4.12<1>:UD 0x100F0F0F:UD {align1};
+mov (1) vme_msg_4.16<1>:UD 0x01010101:UD {align1};
+mov (1) vme_msg_4.20<1>:UD 0x10010101:UD {align1};
+mov (1) vme_msg_4.24<1>:UD 0x0F0F0F0F:UD {align1};
+mov (1) vme_msg_4.28<1>:UD 0x100F0F0F:UD {align1};
+
+mov (1) vme_msg_5.0<1>:UD 0x01010101:UD {align1};
+mov (1) vme_msg_5.4<1>:UD 0x10010101:UD {align1};
+mov (1) vme_msg_5.8<1>:UD 0x0F0F0F0F:UD {align1};
+mov (1) vme_msg_5.12<1>:UD 0x000F0F0F:UD {align1};
+
+mov (4) vme_msg_5.16<1>:UD 0x0:UD {align1};
+
+send (8)
+ vme_msg_ind
+ vme_wb<1>:UD
+ null
+ vme(
+ BIND_IDX_VME,
+ 0,
+ 0,
+ VME_IME_MESSAGE_TYPE
+ )
+ mlen ime_vme_msg_length
+ rlen vme_wb_length {align1};
+
+/* Set Macroblock-shape/mode for FBR */
+
+mov (1) vme_m2.20<1>:UD 0x0:UD {align1};
+mov (1) vme_m2.21<1>:UB vme_wb.25<0,1,0>:UB {align1};
+mov (1) vme_m2.22<1>:UB vme_wb.26<0,1,0>:UB {align1};
+
+and (1) tmp_reg0.0<1>:UW vme_wb.0<0,1,0>:UW 0x03:UW {align1};
+mov (1) vme_m2.20<1>:UB tmp_reg0.0<0,1,0>:UB {align1};
+
+/* Send FBR message into CRE */
+
+mov (8) vme_msg_4.0<1>:UD vme_wb1.0<8,8,1>:UD {align1};
+mov (8) vme_msg_5.0<1>:ud vme_wb2.0<8,8,1>:ud {align1};
+mov (8) vme_msg_6.0<1>:ud vme_wb3.0<8,8,1>:ud {align1};
+mov (8) vme_msg_7.0<1>:ud vme_wb4.0<8,8,1>:ud {align1};
+
+mov (1) vme_m0.12<1>:UD INTER_SAD_HAAR + SUB_PEL_MODE_QUARTER + FBR_BME_DISABLE:UD {align1}; /* 16x16 Source, 1/4 pixel, harr, BME disable */
+mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1};
+mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1};
+
+mov (8) vme_msg_2.0<1>:UD vme_m2.0<8,8,1>:UD {align1};
+mov (8) vme_msg_3.0<1>:UD vme_m3.0<8,8,1>:UD {align1};
+
+/* after verification it will be passed by using payload */
+send (8)
+ vme_msg_ind
+ vme_wb<1>:UD
+ null
+ cre(
+ BIND_IDX_VME,
+ VME_FBR_MESSAGE_TYPE
+ )
+ mlen fbr_vme_msg_length
+ rlen vme_wb_length
+ {align1};
+
+add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x02:UD {align1};
+mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1};
+/* write FME info */
+mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1};
+
+mov (1) msg_reg1.4<1>:UD vme_wb.24<0,1,0>:UD {align1};
+/* Inter distortion of FME */
+mov (1) msg_reg1.8<1>:UD vme_wb.8<0,1,0>:UD {align1};
+
+mov (1) msg_reg1.12<1>:UD vme_m2.20<0,1,0>:UD {align1};
+
+/* bind index 3, write oword (16bytes), msg type: 8(OWord Block Write) */
+send (16)
+ msg_ind
+ obw_wb
+ null
+ data_port(
+ OBW_CACHE_TYPE,
+ OBW_MESSAGE_TYPE,
+ OBW_CONTROL_0,
+ OBW_BIND_IDX,
+ OBW_WRITE_COMMIT_CATEGORY,
+ OBW_HEADER_PRESENT
+ )
+ mlen 2
+ rlen obw_wb_length
+ {align1};
+
+/* Write FME/BME MV */
+add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x01:UD {align1};
+mov (8) msg_reg0.0<1>:UD obw_m0.0<8,8,1>:UD {align1};
+
+
+mov (8) msg_reg1.0<1>:UD vme_wb1.0<8,8,1>:UD {align1};
+mov (8) msg_reg2.0<1>:ud vme_wb2.0<8,8,1>:ud {align1};
+mov (8) msg_reg3.0<1>:ud vme_wb3.0<8,8,1>:ud {align1};
+mov (8) msg_reg4.0<1>:ud vme_wb4.0<8,8,1>:ud {align1};
+/* bind index 3, write 8 oword (128 bytes), msg type: 8(OWord Block Write) */
+send (16)
+ msg_ind
+ obw_wb
+ null
+ data_port(
+ OBW_CACHE_TYPE,
+ OBW_MESSAGE_TYPE,
+ OBW_CONTROL_8,
+ OBW_BIND_IDX,
+ OBW_WRITE_COMMIT_CATEGORY,
+ OBW_HEADER_PRESENT
+ )
+ mlen 5
+ rlen obw_wb_length
+ {align1};
+
+/* Write FME/BME RefID */
+add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD 0x08:UD {align1};
+mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1};
+
+mov (8) msg_reg1.0<1>:UD vme_wb6.0<8,8,1>:UD {align1};
+
+/* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */
+send (16)
+ msg_ind
+ obw_wb
+ null
+ data_port(
+ OBW_CACHE_TYPE,
+ OBW_MESSAGE_TYPE,
+ OBW_CONTROL_2,
+ OBW_BIND_IDX,
+ OBW_WRITE_COMMIT_CATEGORY,
+ OBW_HEADER_PRESENT
+ )
+ mlen 2
+ rlen obw_wb_length
+ {align1};
+
+/* Issue message fence so that the previous write message is committed */
+send (16)
+ mb_ind
+ mb_wb.0<1>:ud
+ NULL
+ data_port(
+ OBR_CACHE_TYPE,
+ OBR_MESSAGE_FENCE,
+ OBR_MF_COMMIT,
+ OBR_BIND_IDX,
+ OBR_WRITE_COMMIT_CATEGORY,
+ OBR_HEADER_PRESENT
+ )
+ mlen 1
+ rlen 1
+ {align1};
+
+__EXIT:
+/*
+ * kill thread
+ */
+mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1};
+send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT};
+
+
+ nop ;
+ nop ;
+/* Compare three word data to get the min value */
+word_imin:
+ cmp.le.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1};
+ (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1};
+ (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1};
+ cmp.le.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1};
+ (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1};
+ (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1};
+ RETURN {align1};
+
+/* Compare three word data to get the max value */
+word_imax:
+ cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1};
+ (f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.0<0,1,0>:w {align1};
+ (-f0.0) mov (1) TEMP_VAR0.0<1>:w INPUT_ARG0.4<0,1,0>:w {align1};
+ cmp.ge.f0.0 (1) null:w TEMP_VAR0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1};
+ (f0.0) mov (1) RET_ARG<1>:w TEMP_VAR0.0<0,1,0>:w {align1};
+ (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1};
+ RETURN {align1};
+
+word_imedian:
+ cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.4<0,1,0>:w {align1};
+ (f0.0) jmpi (1) cmp_a_ge_b;
+ cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1};
+ (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1};
+ (f0.0) jmpi (1) cmp_end;
+ cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1};
+ (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1};
+ (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1};
+ jmpi (1) cmp_end;
+cmp_a_ge_b:
+ cmp.ge.f0.0 (1) null:w INPUT_ARG0.4<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1};
+ (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.4<0,1,0>:w {align1};
+ (f0.0) jmpi (1) cmp_end;
+ cmp.ge.f0.0 (1) null:w INPUT_ARG0.0<0,1,0>:w INPUT_ARG0.8<0,1,0>:w {align1};
+ (f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.8<0,1,0>:w {align1};
+ (-f0.0) mov (1) RET_ARG<1>:w INPUT_ARG0.0<0,1,0>:w {align1};
+cmp_end:
+ RETURN {align1};
+
diff --git a/src/shaders/vme/vp8_inter_frame_gen9.g9a b/src/shaders/vme/vp8_inter_frame_gen9.g9a
new file mode 100644
index 0000000..cbc262c
--- /dev/null
+++ b/src/shaders/vme/vp8_inter_frame_gen9.g9a
@@ -0,0 +1,2 @@
+#include "vme8.inc"
+#include "vp8_inter_frame_gen9.asm"
diff --git a/src/shaders/vme/vp8_inter_frame_gen9.g9b b/src/shaders/vme/vp8_inter_frame_gen9.g9b
new file mode 100644
index 0000000..7845083
--- /dev/null
+++ b/src/shaders/vme/vp8_inter_frame_gen9.g9b
@@ -0,0 +1,300 @@
+ { 0x00800001, 0x24000608, 0x00000000, 0x00000000 },
+ { 0x00800001, 0x24400608, 0x00000000, 0x00000000 },
+ { 0x00800001, 0x24800608, 0x00000000, 0x00000000 },
+ { 0x00800001, 0x24c00608, 0x00000000, 0x00000000 },
+ { 0x00200009, 0x24002228, 0x164500a0, 0x00040004 },
+ { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 },
+ { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff },
+ { 0x00000001, 0x24080e08, 0x08000000, 0x0000001f },
+ { 0x00000001, 0x24142288, 0x00000014, 0x00000000 },
+ { 0x00200009, 0x24202228, 0x164500a0, 0x00040004 },
+ { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc },
+ { 0x00000001, 0x24280e08, 0x08000000, 0x000f0003 },
+ { 0x00000001, 0x24342288, 0x00000014, 0x00000000 },
+ { 0x00200009, 0x24482248, 0x164500a0, 0x00040004 },
+ { 0x00000001, 0x24542288, 0x00000014, 0x00000000 },
+ { 0x00000041, 0x24881208, 0x220000a2, 0x000000a1 },
+ { 0x00000040, 0x24880208, 0x22000488, 0x000000a0 },
+ { 0x00000041, 0x24880208, 0x06000488, 0x00000018 },
+ { 0x00000001, 0x24942288, 0x00000014, 0x00000000 },
+ { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 },
+ { 0x0c600031, 0x23800a88, 0x06000800, 0x02190004 },
+ { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 },
+ { 0x0c600031, 0x23a00a88, 0x06000800, 0x02290004 },
+ { 0x00200009, 0x24002228, 0x164500a0, 0x00030003 },
+ { 0x00000041, 0x24000a28, 0x1e000400, 0x00020002 },
+ { 0x00000040, 0x24000a28, 0x1e000400, 0xfff8fff8 },
+ { 0x00000040, 0x24040a28, 0x1e000404, 0xffffffff },
+ { 0x00600001, 0x28000208, 0x008d0400, 0x00000000 },
+ { 0x0c600031, 0x26000a88, 0x06000800, 0x02190006 },
+ { 0x00200009, 0x24202228, 0x164500a0, 0x00030003 },
+ { 0x00000041, 0x24200a28, 0x1e000420, 0x00020002 },
+ { 0x00000040, 0x24200a28, 0x1e000420, 0xfffcfffc },
+ { 0x00000001, 0x24280e08, 0x08000000, 0x00070003 },
+ { 0x00600001, 0x28000208, 0x008d0420, 0x00000000 },
+ { 0x0c600031, 0x26200a88, 0x06000800, 0x02190006 },
+ { 0x00600001, 0x2ac00608, 0x00000000, 0x00000000 },
+ { 0x00600001, 0x2a800608, 0x00000000, 0x00000000 },
+ { 0x01000005, 0x20001240, 0x160000a6, 0x00040004 },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x00000750 },
+ { 0x00600001, 0x2ae00608, 0x00000000, 0x00000000 },
+ { 0x00600001, 0x2b000608, 0x00000000, 0x00000000 },
+ { 0x00600001, 0x2b200608, 0x00000000, 0x00000000 },
+ { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 },
+ { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 },
+ { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 },
+ { 0x00000001, 0x2ae00e28, 0x08000000, 0x00000001 },
+ { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 },
+ { 0x00000040, 0x24001a68, 0x1e000400, 0xffffffff },
+ { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 },
+ { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 },
+ { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 },
+ { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 },
+ { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 },
+ { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 },
+ { 0x00210001, 0x2af41e68, 0x18000000, 0xffffffff },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 },
+ { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 },
+ { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02480403 },
+ { 0x00200001, 0x2ae40208, 0x00450bc8, 0x00000000 },
+ { 0x00000001, 0x2af01e68, 0x18000000, 0x00010001 },
+ { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 },
+ { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 },
+ { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff },
+ { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x00000360 },
+ { 0x00000001, 0x2b000e28, 0x08000000, 0x00000001 },
+ { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 },
+ { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff },
+ { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 },
+ { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 },
+ { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 },
+ { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 },
+ { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 },
+ { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 },
+ { 0x00210001, 0x2b141e68, 0x18000000, 0xffffffff },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 },
+ { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 },
+ { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02480403 },
+ { 0x00200001, 0x2b040208, 0x00450bf0, 0x00000000 },
+ { 0x00000001, 0x2b101e68, 0x18000000, 0x00010001 },
+ { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 },
+ { 0x01000005, 0x20002240, 0x160000a5, 0x00080008 },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x00000110 },
+ { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 },
+ { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 },
+ { 0x00000040, 0x24021a68, 0x1e000402, 0xffffffff },
+ { 0x00000040, 0x24001a68, 0x1e000400, 0x00010001 },
+ { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 },
+ { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 },
+ { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 },
+ { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 },
+ { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 },
+ { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 },
+ { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x00000180 },
+ { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 },
+ { 0x0a800031, 0x2ba00a08, 0x06000b40, 0x02480403 },
+ { 0x00200001, 0x2b240208, 0x00450bf0, 0x00000000 },
+ { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 },
+ { 0x00000020, 0x34000000, 0x0e001400, 0x00000130 },
+ { 0x00600001, 0x2b400608, 0x00000000, 0x00000000 },
+ { 0x01000005, 0x20002240, 0x160000a5, 0x00040004 },
+ { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x000000f0 },
+ { 0x00000001, 0x2b200e28, 0x08000000, 0x00000001 },
+ { 0x00200001, 0x24002248, 0x004500a0, 0x00000000 },
+ { 0x00200040, 0x24001a68, 0x1e450400, 0xffffffff },
+ { 0x00000041, 0x2b481208, 0x120000a2, 0x00000402 },
+ { 0x00000040, 0x2b480208, 0x12000b48, 0x00000400 },
+ { 0x00000041, 0x2b480208, 0x06000b48, 0x00000018 },
+ { 0x00000001, 0x2b542288, 0x00000014, 0x00000000 },
+ { 0x0a800031, 0x2b600a08, 0x06000b40, 0x02280303 },
+ { 0x05000010, 0x20001260, 0x12000b70, 0x00000b88 },
+ { 0x00210001, 0x2b341e68, 0x18000000, 0xffffffff },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x00000040 },
+ { 0x00000040, 0x2b480208, 0x06000b48, 0x00000003 },
+ { 0x0a800031, 0x2ba00a88, 0x06000b40, 0x02480403 },
+ { 0x00200001, 0x2b240208, 0x00450c18, 0x00000000 },
+ { 0x00000001, 0x2b301e68, 0x18000000, 0x00010001 },
+ { 0x00000040, 0x24000a28, 0x0a000b00, 0x00000b20 },
+ { 0x01000010, 0x20000a20, 0x0e000400, 0x00000000 },
+ { 0x00110020, 0x34000000, 0x0e001400, 0x00000080 },
+ { 0x02000010, 0x20000a20, 0x0e000ae0, 0x00000000 },
+ { 0x00010001, 0x2b040208, 0x00000ae4, 0x00000000 },
+ { 0x00010001, 0x2b240208, 0x00000ae4, 0x00000000 },
+ { 0x00010001, 0x2b141248, 0x00000af4, 0x00000000 },
+ { 0x00010001, 0x2b341248, 0x00000af4, 0x00000000 },
+ { 0x00010001, 0x2ac00208, 0x00000ae4, 0x00000000 },
+ { 0x00110001, 0x2ac00608, 0x00000000, 0x00000000 },
+ { 0x00000020, 0x34000000, 0x0e001400, 0x00000190 },
+ { 0x00600001, 0x24000608, 0x00000000, 0x00000000 },
+ { 0x01000010, 0x20001a20, 0x1e000af4, 0x00000000 },
+ { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 },
+ { 0x00010001, 0x24040208, 0x00000ae4, 0x00000000 },
+ { 0x01000010, 0x20001a20, 0x1e000b14, 0x00000000 },
+ { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 },
+ { 0x00010001, 0x24040208, 0x00000b04, 0x00000000 },
+ { 0x01000010, 0x20001a20, 0x1e000b34, 0x00000000 },
+ { 0x00010040, 0x24001a68, 0x1e000400, 0x00010001 },
+ { 0x00010001, 0x24040208, 0x00000b24, 0x00000000 },
+ { 0x01000010, 0x20001a20, 0x1e000400, 0x00010001 },
+ { 0x00010001, 0x2ac00208, 0x00000404, 0x00000000 },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x000000c0 },
+ { 0x00000001, 0x2fa01a68, 0x00000ae4, 0x00000000 },
+ { 0x00000001, 0x2fa41a68, 0x00000b04, 0x00000000 },
+ { 0x00000001, 0x2fa81a68, 0x00000b24, 0x00000000 },
+ { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 },
+ { 0x00000020, 0x34000000, 0x0e001400, 0x00000870 },
+ { 0x00000001, 0x2ac01a68, 0x00000fe4, 0x00000000 },
+ { 0x00000001, 0x2fa01a68, 0x00000ae6, 0x00000000 },
+ { 0x00000001, 0x2fa41a68, 0x00000b06, 0x00000000 },
+ { 0x00000001, 0x2fa81a68, 0x00000b26, 0x00000000 },
+ { 0x00000040, 0x2fe00008, 0x06001400, 0x00000020 },
+ { 0x00000020, 0x34000000, 0x0e001400, 0x00000810 },
+ { 0x00000001, 0x2ac21a68, 0x00000fe4, 0x00000000 },
+ { 0x0020000c, 0x2a801a68, 0x1e450ac0, 0x00020002 },
+ { 0x00200040, 0x2a881a68, 0x1e450a80, 0x00030003 },
+ { 0x00200005, 0x2a901248, 0x16450a88, 0xfffcfffc },
+ { 0x00600001, 0x25600208, 0x008d0020, 0x00000000 },
+ { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 },
+ { 0x00600001, 0x28600608, 0x00000000, 0x00000000 },
+ { 0x00600001, 0x28800608, 0x00000000, 0x00000000 },
+ { 0x00000001, 0x23800608, 0x00000000, 0x00000000 },
+ { 0x00000005, 0x23840208, 0x06000384, 0xff000000 },
+ { 0x00600001, 0x28a00208, 0x008d0380, 0x00000000 },
+ { 0x00000001, 0x24001648, 0x10000000, 0x00010001 },
+ { 0x00000001, 0x28a52288, 0x00000400, 0x00000000 },
+ { 0x00600001, 0x28c00608, 0x00000000, 0x00000000 },
+ { 0x00800001, 0x28c02288, 0x00cf03a3, 0x00000000 },
+ { 0x00000001, 0x28d00608, 0x00000000, 0x11111111 },
+ { 0x00000001, 0x28dc0608, 0x00000000, 0x00010101 },
+ { 0x00000001, 0x28d41248, 0x00000606, 0x00000000 },
+ { 0x00400001, 0x28f00208, 0x00690608, 0x00000000 },
+ { 0x00600001, 0x28e01248, 0x00ae0622, 0x00000000 },
+ { 0x00000001, 0x247c1648, 0x10000000, 0x00000000 },
+ { 0x00000001, 0x247c0e88, 0x08000000, 0x00000002 },
+ { 0x00000001, 0x247d2288, 0x000000a5, 0x00000000 },
+ { 0x00000001, 0x24001648, 0x10000000, 0x00200020 },
+ { 0x00000001, 0x247e2288, 0x00000400, 0x00000000 },
+ { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 },
+ { 0x00000001, 0x244c0608, 0x00000000, 0x00800000 },
+ { 0x00000001, 0x244f0e88, 0x08000000, 0x00000060 },
+ { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 },
+ { 0x0d600031, 0x21800a08, 0x06000800, 0x10782000 },
+ { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 },
+ { 0x00000001, 0x28200208, 0x00000180, 0x00000000 },
+ { 0x00000001, 0x28240208, 0x00000190, 0x00000000 },
+ { 0x00000001, 0x28280208, 0x00000194, 0x00000000 },
+ { 0x00000001, 0x282c0208, 0x00000198, 0x00000000 },
+ { 0x00000001, 0x28301248, 0x0000018c, 0x00000000 },
+ { 0x00000001, 0x28340208, 0x00000188, 0x00000000 },
+ { 0x00000001, 0x28380208, 0x0000019c, 0x00000000 },
+ { 0x00000001, 0x283c0208, 0x00000488, 0x00000000 },
+ { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 },
+ { 0x00000001, 0x244c0608, 0x00000000, 0x00200000 },
+ { 0x00000001, 0x24561648, 0x10000000, 0x28302830 },
+ { 0x00000001, 0x24400208, 0x00000448, 0x00000000 },
+ { 0x00000040, 0x24401a68, 0x1e000440, 0xfff0fff0 },
+ { 0x00000040, 0x24421a68, 0x1e000442, 0xfff4fff4 },
+ { 0x00000001, 0x24401e68, 0x18000000, 0xfff0fff0 },
+ { 0x00000001, 0x24421e68, 0x18000000, 0xfff4fff4 },
+ { 0x00000001, 0x24440208, 0x00000440, 0x00000000 },
+ { 0x01000005, 0x20002240, 0x160000a5, 0x00600060 },
+ { 0x00010040, 0x24401a68, 0x1e000440, 0x000c000c },
+ { 0x01000005, 0x20002240, 0x160000a5, 0x00100010 },
+ { 0x00010040, 0x24421a68, 0x1e000442, 0x00080008 },
+ { 0x00200040, 0x24401a68, 0x1a450440, 0x00450a90 },
+ { 0x00200040, 0x24441a68, 0x1a450444, 0x00450a90 },
+ { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 },
+ { 0x00000001, 0x24600608, 0x00000000, 0x00000002 },
+ { 0x00000001, 0x24642288, 0x0000009c, 0x00000000 },
+ { 0x00000001, 0x24680608, 0x00000000, 0x30003030 },
+ { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 },
+ { 0x00400001, 0x45800208, 0x00000ac0, 0x00000000 },
+ { 0x00400001, 0x45840208, 0x00000ac0, 0x00000000 },
+ { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 },
+ { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 },
+ { 0x00000001, 0x28800608, 0x00000000, 0x01010101 },
+ { 0x00000001, 0x28840608, 0x00000000, 0x10010101 },
+ { 0x00000001, 0x28880608, 0x00000000, 0x0f0f0f0f },
+ { 0x00000001, 0x288c0608, 0x00000000, 0x100f0f0f },
+ { 0x00000001, 0x28900608, 0x00000000, 0x01010101 },
+ { 0x00000001, 0x28940608, 0x00000000, 0x10010101 },
+ { 0x00000001, 0x28980608, 0x00000000, 0x0f0f0f0f },
+ { 0x00000001, 0x289c0608, 0x00000000, 0x100f0f0f },
+ { 0x00000001, 0x28a00608, 0x00000000, 0x01010101 },
+ { 0x00000001, 0x28a40608, 0x00000000, 0x10010101 },
+ { 0x00000001, 0x28a80608, 0x00000000, 0x0f0f0f0f },
+ { 0x00000001, 0x28ac0608, 0x00000000, 0x000f0f0f },
+ { 0x00400001, 0x28b00608, 0x00000000, 0x00000000 },
+ { 0x08600031, 0x21800a08, 0x06000800, 0x0c784000 },
+ { 0x00000001, 0x25740608, 0x00000000, 0x00000000 },
+ { 0x00000001, 0x25752288, 0x00000199, 0x00000000 },
+ { 0x00000001, 0x25762288, 0x0000019a, 0x00000000 },
+ { 0x00000005, 0x24001248, 0x16000180, 0x00030003 },
+ { 0x00000001, 0x25742288, 0x00000400, 0x00000000 },
+ { 0x00600001, 0x28800208, 0x008d01a0, 0x00000000 },
+ { 0x00600001, 0x28a00208, 0x008d01c0, 0x00000000 },
+ { 0x00600001, 0x28c00208, 0x008d01e0, 0x00000000 },
+ { 0x00600001, 0x28e00208, 0x008d0200, 0x00000000 },
+ { 0x00000001, 0x244c0608, 0x00000000, 0x00243000 },
+ { 0x00600001, 0x28000208, 0x008d0440, 0x00000000 },
+ { 0x00600001, 0x28200208, 0x008d0460, 0x00000000 },
+ { 0x00600001, 0x28400208, 0x008d0560, 0x00000000 },
+ { 0x00600001, 0x28600208, 0x008d0580, 0x00000000 },
+ { 0x0d600031, 0x21800a08, 0x06000800, 0x10786000 },
+ { 0x00000040, 0x24880208, 0x06000488, 0x00000002 },
+ { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 },
+ { 0x00000001, 0x28200208, 0x00000180, 0x00000000 },
+ { 0x00000001, 0x28240208, 0x00000198, 0x00000000 },
+ { 0x00000001, 0x28280208, 0x00000188, 0x00000000 },
+ { 0x00000001, 0x282c0208, 0x00000574, 0x00000000 },
+ { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0003 },
+ { 0x00000040, 0x24880208, 0x06000488, 0x00000001 },
+ { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 },
+ { 0x00600001, 0x28200208, 0x008d01a0, 0x00000000 },
+ { 0x00600001, 0x28400208, 0x008d01c0, 0x00000000 },
+ { 0x00600001, 0x28600208, 0x008d01e0, 0x00000000 },
+ { 0x00600001, 0x28800208, 0x008d0200, 0x00000000 },
+ { 0x0a800031, 0x20000a60, 0x06000800, 0x0a0a0403 },
+ { 0x00000040, 0x24880208, 0x06000488, 0x00000008 },
+ { 0x00600001, 0x28000208, 0x008d0480, 0x00000000 },
+ { 0x00600001, 0x28200208, 0x008d0240, 0x00000000 },
+ { 0x0a800031, 0x20000a60, 0x06000800, 0x040a0203 },
+ { 0x0a800031, 0x2b600a08, 0x06000b40, 0x0219e003 },
+ { 0x00600001, 0x2e000208, 0x008d0000, 0x00000000 },
+ { 0x07800031, 0x24000a40, 0x06000e00, 0x82000010 },
+ { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
+ { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
+ { 0x06000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 },
+ { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 },
+ { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 },
+ { 0x06000010, 0x20001a60, 0x1a000f60, 0x00000fa8 },
+ { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 },
+ { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 },
+ { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 },
+ { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 },
+ { 0x00010001, 0x2f601a68, 0x00000fa0, 0x00000000 },
+ { 0x00110001, 0x2f601a68, 0x00000fa4, 0x00000000 },
+ { 0x04000010, 0x20001a60, 0x1a000f60, 0x00000fa8 },
+ { 0x00010001, 0x2fe41a68, 0x00000f60, 0x00000000 },
+ { 0x00110001, 0x2fe41a68, 0x00000fa8, 0x00000000 },
+ { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 },
+ { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa4 },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x00000070 },
+ { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 },
+ { 0x00010001, 0x2fe41a68, 0x00000fa0, 0x00000000 },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x000000a0 },
+ { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 },
+ { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 },
+ { 0x00110001, 0x2fe41a68, 0x00000fa4, 0x00000000 },
+ { 0x00000020, 0x34000000, 0x0e001400, 0x00000060 },
+ { 0x04000010, 0x20001a60, 0x1a000fa4, 0x00000fa8 },
+ { 0x00010001, 0x2fe41a68, 0x00000fa4, 0x00000000 },
+ { 0x00010020, 0x34000000, 0x0e001400, 0x00000030 },
+ { 0x04000010, 0x20001a60, 0x1a000fa0, 0x00000fa8 },
+ { 0x00010001, 0x2fe41a68, 0x00000fa8, 0x00000000 },
+ { 0x00110001, 0x2fe41a68, 0x00000fa0, 0x00000000 },
+ { 0x00000001, 0x34000200, 0x00000fe0, 0x00000000 },
--
1.9.1
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