[Libva] [PATCH 5/5] vpp/gen9: Use 48 bit address relocation for STATE_BASE_ADDRESS
Zhao Yakui
yakui.zhao at intel.com
Mon Oct 12 01:41:41 PDT 2015
On 10/12/2015 04:38 PM, sreerenj.balachandran at intel.com wrote:
> From: Sreerenj Balachandran<sreerenj.balachandran at intel.com>
>
> Use 48 bit address relocation for Surface state address, Dynamic state address
> and Instruction base address.
This looks good to me.
Thanks.
Yakui
>
> Signed-off-by: Sreerenj Balachandran<sreerenj.balachandran at intel.com>
> ---
> src/gen9_post_processing.c | 15 ++++++---------
> 1 file changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/src/gen9_post_processing.c b/src/gen9_post_processing.c
> index a60c70b..46a156f 100644
> --- a/src/gen9_post_processing.c
> +++ b/src/gen9_post_processing.c
> @@ -348,21 +348,18 @@ gen9_pp_state_base_address(VADriverContextP ctx,
> OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY);
> OUT_BATCH(batch, 0);
> OUT_BATCH(batch, 0);
> - /* DW4. Surface state address */
> - OUT_RELOC(batch, pp_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */
> - OUT_BATCH(batch, 0);
> - /* DW6. Dynamic state address */
> - OUT_RELOC(batch, pp_context->dynamic_state.bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_SAMPLER,
> + /* DW4-5 Surface state address */
> + OUT_RELOC64(batch, pp_context->surface_state_binding_table.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY); /* Surface state base address */
> + /* DW6-7 Dynamic state address */
> + OUT_RELOC64(batch, pp_context->dynamic_state.bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_SAMPLER,
> 0, 0 | BASE_ADDRESS_MODIFY);
> - OUT_BATCH(batch, 0);
>
> /* DW8. Indirect object address */
> OUT_BATCH(batch, 0 | BASE_ADDRESS_MODIFY);
> OUT_BATCH(batch, 0);
>
> - /* DW10. Instruction base address */
> - OUT_RELOC(batch, pp_context->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
> - OUT_BATCH(batch, 0);
> + /* DW10-11 Instruction base address */
> + OUT_RELOC64(batch, pp_context->instruction_state.bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
>
> OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY);
> OUT_BATCH(batch, 0xFFFF0000 | BASE_ADDRESS_MODIFY);
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