[Libva] [libva-intel-driver][PATCH] CSC: Remove average logic when saving NV12 surface on IVB+

[Emil Velikov]

Hi Haihao,

On 7 April 2016 at 17:28, Xiang, Haihao <haihao.xiang at intel.com> wrote:
> This fixes the issue mentioned in https://bugs.freedesktop.org/show_bug.cgi?id=94845 on
> IVB+(except KBL)
>
>From a quick diff it seems that the post processing shaders/assembly
is identical between gen7 and gen8, correct ?

Obviously there are a few missing <1> (afaict they do not made any
difference) and a few missing files for gen8 but everything else is
just white space.
As such shouldn't one consolidate things ? Earlier gen do share a fair
bit, and if I have to wild guess I'd say things don't differ that much
between them and gen7+.


> diff --git a/src/shaders/post_processing/gen7/Save_AVS_NV12.g4a b/src/shaders/post_processing/gen7/Save_AVS_NV12.g4a
> index d302ed5..e4eb8e6 100644
> --- a/src/shaders/post_processing/gen7/Save_AVS_NV12.g4a
> +++ b/src/shaders/post_processing/gen7/Save_AVS_NV12.g4a
> @@ -460,30 +460,14 @@
>         add.sat (16) r[a0.1,96]<1>:uw           r[a0.1,96]<16;16,1>:uw          0x0080:uw
>
>         // U Averaging and Rounding, 8x2 top part
> -       shr   (8)       uwBUFFER_5(0,0)<2>                      r[a0.2,0]<16;8,2>:uw                    1:w
> -       shr       (8)   uwBUFFER_5(1,0)<2>                      r[a0.2,32]<16;8,2>:uw                   1:w
> -       shr       (8)   uwBUFFER_5(2,0)<2>                      r[a0.2,64]<16;8,2>:uw                   1:w
> -       shr   (8)       uwBUFFER_5(3,0)<2>                      r[a0.2,96]<16;8,2>:uw                   1:w
> -
> -       add       (8)   uwBUFFER_5(0,0)<2>                      uwBUFFER_5(0,0)<16;8,2>                         uwBUFFER_5(1,0)<16;8,2>
> -       add.sat (8) r[a0.2,0]<2>:uw             uwBUFFER_5(0,0)<16;8,2>                         0x0080:uw
> -
> -       add       (8)   uwBUFFER_5(2,0)<2>                      uwBUFFER_5(2,0)<16;8,2>                         uwBUFFER_5(3,0)<16;8,2>
> -       add.sat (8) r[a0.2,64]<2>:uw            uwBUFFER_5(2,0)<16;8,2>                         0x0080:uw
> -
> +       add.sat (8) r[a0.2,0]<2>:uw             r[a0.2,0]<16;8,2>:uw            0x0080:uw
> +       add.sat (8) r[a0.2,64]<2>:uw            r[a0.2,64]<16;8,2>:uw           0x0080:uw
> +
>         // V Averaging and Rounding, 8x2 top part
> -       shr   (8)       uwBUFFER_5(4,0)<2>                      r[a0.0,0]<16;8,2>:uw                    1:w
> -       shr       (8)   uwBUFFER_5(5,0)<2>                      r[a0.0,32]<16;8,2>:uw                   1:w
> -       shr       (8)   uwBUFFER_5(6,0)<2>                      r[a0.0,64]<16;8,2>:uw                   1:w
> -       shr   (8)       uwBUFFER_5(7,0)<2>                      r[a0.0,96]<16;8,2>:uw                   1:w
> -
> -       add       (8)   uwBUFFER_5(4,0)<2>                      uwBUFFER_5(4,0)<16;8,2>                         uwBUFFER_5(5,0)<16;8,2>
> -       add.sat (8) r[a0.0,0]<2>:uw             uwBUFFER_5(4,0)<16;8,2>                         0x0080:uw
> -
> -       add       (8)   uwBUFFER_5(6,0)<2>                      uwBUFFER_5(6,0)<16;8,2>                         uwBUFFER_5(7,0)<16;8,2>
> -       add.sat (8) r[a0.0,64]<2>:uw            uwBUFFER_5(6,0)<16;8,2>                         0x0080:uw
> -
> -       add   (4) a0.0:uw                       r22.0<4;4,1>:w          1024:uw //Update Buffer 2 pointers
> +       add.sat (8) r[a0.0,0]<2>:uw             r[a0.0,0]<16;8,2>:uw            0x0080:uw
> +       add.sat (8) r[a0.0,64]<2>:uw            r[a0.0,64]<16;8,2>:uw           0x0080:uw
> +
> +       add   (4) a0.0<1>:uw                    r22.0<4;4,1>:w          1024:uw //Update Buffer 2 pointers
>
The addition of <1> in the above is unrelated to the rest of the
patch, isn't it ? Comparing against the gen8 we have a few more
missing. If refactoring things isn't an option (at least at the
moment), shouldn't one at least get those sorted as a separate
preparatory patch ?

-Emil