[Libva] [PATCH 04/14] encoding: Send VME instruction uses one register as the desc parameter instead of hardcode
Qu, Pengfei
pengfei.qu at intel.com
Wed Jul 6 05:23:04 UTC 2016
Sure, Gen8 also has the similar change.
Thanks,
Pengfei
-----Original Message-----
From: Xiang, Haihao
Sent: Friday, July 1, 2016 2:18 PM
To: Qu, Pengfei <pengfei.qu at intel.com>; libva at lists.freedesktop.org
Cc: ceciliapeng at intel.com
Subject: Re: [Libva] [PATCH 04/14] encoding: Send VME instruction uses one register as the desc parameter instead of hardcode
This patch LGTM, but one question: does Gen8+ need a similar patch?
Thanks
Haihao
> From: Zhao Yakui <yakui.zhao at intel.com>
>
> The desc parameter of current VME send instruction is hardcode. And it
> can't be updated based on the input parameter.
>
> Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
> Signed-off-by: pjl <ceciliapeng at intel.com>
> Signed-off-by: Pengfei Qu <Pengfei.Qu at intel.com>
> ---
> src/shaders/vme/inter_bframe_ivb.asm | 17 +++--------------
> src/shaders/vme/inter_bframe_ivb.g7b | 19 ++++++++++---------
> src/shaders/vme/inter_frame_ivb.asm | 16 +++-------------
> src/shaders/vme/inter_frame_ivb.g7b | 7 ++++---
> src/shaders/vme/intra_frame_ivb.asm | 17 +++--------------
> src/shaders/vme/intra_frame_ivb.g7b | 3 ++-
> 6 files changed, 25 insertions(+), 54 deletions(-)
>
> diff --git a/src/shaders/vme/inter_bframe_ivb.asm
> b/src/shaders/vme/inter_bframe_ivb.asm
> index e7be377..499e426 100644
> --- a/src/shaders/vme/inter_bframe_ivb.asm
> +++ b/src/shaders/vme/inter_bframe_ivb.asm
> @@ -542,20 +542,9 @@ mov (1) vme_m1.16<1>:ud mb_mvp_ref.0<0,1
> ,0>:ud {align1};
> mov (1) vme_m1.20<1>:ud mb_mvp_ref.4<0,1,0>:ud {align
> 1};
> mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1};
>
> -
> -send (8)
> - vme_msg_ind
> - vme_wb
> - null
> - vme(
> - BIND_IDX_VME,
> - 0,
> - 0,
> - VME_MESSAGE_TYPE_MIXED
> - )
> - mlen vme_msg_length
> - rlen vme_inter_wb_length
> - {align1};
> +/* Use one register as the descriptor of send instruction instead of
> hardcode*/
> +mov (1) a0.0<1>:ud 0x0a686000:ud {align1}; send (1)
> +vme_wb.0<1>:ud vme_msg_0 0x08 a0.0<0,1,0>:ud
> {align1};
>
> and.z.f0.0 (1) null<1>:ud vme_wb0.0<0,1,0>:ud
> INTRAMBFLAG_MASK:ud {align1} ;
>
> diff --git a/src/shaders/vme/inter_bframe_ivb.g7b
> b/src/shaders/vme/inter_bframe_ivb.g7b
> index adcb390..7f24b63 100644
> --- a/src/shaders/vme/inter_bframe_ivb.g7b
> +++ b/src/shaders/vme/inter_bframe_ivb.g7b
> @@ -53,7 +53,7 @@
> { 0x00000001, 0x2fa40021, 0x00000b80, 0x00000000 },
> { 0x00000001, 0x2fa80061, 0x00000000, 0x00000001 },
> { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 },
> - { 0x00000020, 0x34001c00, 0x00001400, 0x00000248 },
> + { 0x00000020, 0x34001c00, 0x00001400, 0x0000024a },
> { 0x00000001, 0x2aa00129, 0x00000fe4, 0x00000000 },
> { 0x01000010, 0x20002d28, 0x00000aa0, 0x00000000 },
> { 0x00010001, 0x2af001e9, 0x00000000, 0x00010001 }, @@ -91,7 +91,7
> @@
> { 0x00000001, 0x2fa40021, 0x00000b80, 0x00000000 },
> { 0x00000001, 0x2fa80061, 0x00000000, 0x00000002 },
> { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 },
> - { 0x00000020, 0x34001c00, 0x00001400, 0x000001fc },
> + { 0x00000020, 0x34001c00, 0x00001400, 0x000001fe },
> { 0x00000001, 0x2aa00129, 0x00000fe4, 0x00000000 },
> { 0x01000010, 0x20002d28, 0x00000aa0, 0x00000000 },
> { 0x00010001, 0x2b1001e9, 0x00000000, 0x00010001 }, @@ -127,7
> +127,7 @@
> { 0x00000001, 0x2fa40021, 0x00000b80, 0x00000000 },
> { 0x00000001, 0x2fa80061, 0x00000000, 0x00000002 },
> { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 },
> - { 0x00000020, 0x34001c00, 0x00001400, 0x000001b4 },
> + { 0x00000020, 0x34001c00, 0x00001400, 0x000001b6 },
> { 0x00000001, 0x2aa00129, 0x00000fe4, 0x00000000 },
> { 0x01000010, 0x20002d28, 0x00000aa0, 0x00000000 },
> { 0x00010001, 0x2b3001e9, 0x00000000, 0x00010001 }, @@ -164,7
> +164,7 @@
> { 0x00000001, 0x2fa40021, 0x00000b80, 0x00000000 },
> { 0x00000001, 0x2fa80061, 0x00000000, 0x00000003 },
> { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 },
> - { 0x00000020, 0x34001c00, 0x00001400, 0x0000016a },
> + { 0x00000020, 0x34001c00, 0x00001400, 0x0000016c },
> { 0x00000001, 0x2aa00129, 0x00000fe4, 0x00000000 },
> { 0x00000001, 0x2b3201ed, 0x00000000, 0x00010001 },
> { 0x01000010, 0x20002d28, 0x00000aa0, 0x00000000 }, @@ -205,13
> +205,13 @@
> { 0x00000001, 0x2fa401ad, 0x00000b04, 0x00000000 },
> { 0x00000001, 0x2fa801ad, 0x00000b24, 0x00000000 },
> { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 },
> - { 0x00000020, 0x34001c00, 0x00001400, 0x000000f8 },
> + { 0x00000020, 0x34001c00, 0x00001400, 0x000000fa },
> { 0x00000001, 0x2ac001ad, 0x00000fe4, 0x00000000 },
> { 0x00000001, 0x2fa001ad, 0x00000ae6, 0x00000000 },
> { 0x00000001, 0x2fa401ad, 0x00000b06, 0x00000000 },
> { 0x00000001, 0x2fa801ad, 0x00000b26, 0x00000000 },
> { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 },
> - { 0x00000020, 0x34001c00, 0x00001400, 0x000000ec },
> + { 0x00000020, 0x34001c00, 0x00001400, 0x000000ee },
> { 0x00000001, 0x2ac201ad, 0x00000fe4, 0x00000000 },
> { 0x00600001, 0x24000061, 0x00000000, 0x00000000 },
> { 0x01000010, 0x20003da4, 0x00200af6, 0x00000000 }, @@ -230,13
> +230,13 @@
> { 0x00000001, 0x2fa401ad, 0x00000b08, 0x00000000 },
> { 0x00000001, 0x2fa801ad, 0x00000b28, 0x00000000 },
> { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 },
> - { 0x00000020, 0x34001c00, 0x00001400, 0x000000c6 },
> + { 0x00000020, 0x34001c00, 0x00001400, 0x000000c8 },
> { 0x00000001, 0x2ac401ad, 0x00000fe4, 0x00000000 },
> { 0x00000001, 0x2fa001ad, 0x00000aea, 0x00000000 },
> { 0x00000001, 0x2fa401ad, 0x00000b0a, 0x00000000 },
> { 0x00000001, 0x2fa801ad, 0x00000b2a, 0x00000000 },
> { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 },
> - { 0x00000020, 0x34001c00, 0x00001400, 0x000000ba },
> + { 0x00000020, 0x34001c00, 0x00001400, 0x000000bc },
> { 0x00000001, 0x2ac601ad, 0x00000fe4, 0x00000000 },
> { 0x0040000c, 0x2a803dad, 0x00690ac0, 0x00020002 },
> { 0x00400040, 0x2a883dad, 0x00690a80, 0x00030003 }, @@ -276,7
> +276,8 @@
> { 0x00000001, 0x24700021, 0x00000ac0, 0x00000000 },
> { 0x00000001, 0x24740021, 0x00000ac4, 0x00000000 },
> { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 },
> - { 0x08600031, 0x21801cbd, 0x00000800, 0x0a686000 },
> + { 0x00000001, 0x22000060, 0x00000000, 0x0a686000 },
> + { 0x08000031, 0x21800221, 0x00000800, 0x00000200 },
> { 0x01000005, 0x20000c20, 0x00000180, 0x00002000 },
> { 0x00110020, 0x34001c00, 0x00001400, 0x0000002c },
> { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, diff --git
> a/src/shaders/vme/inter_frame_ivb.asm
> b/src/shaders/vme/inter_frame_ivb.asm
> index 501257a..1d67c50 100644
> --- a/src/shaders/vme/inter_frame_ivb.asm
> +++ b/src/shaders/vme/inter_frame_ivb.asm
> @@ -458,19 +458,9 @@ mov (1) vme_m1.20<1>:ud mb_mvp_ref.0<0,1
> ,0>:ud {align1};
> mov (8) vme_msg_1.0<1>:UD vme_m1.0<8,8,1>:UD {align1};
>
>
> -send (8)
> - vme_msg_ind
> - vme_wb
> - null
> - vme(
> - BIND_IDX_VME,
> - 0,
> - 0,
> - VME_MESSAGE_TYPE_MIXED
> - )
> - mlen vme_msg_length
> - rlen vme_inter_wb_length
> - {align1};
> +/* Use one register as the descriptor of send instruction instead of
> hardcode*/
> +mov (1) a0.0<1>:ud 0x0a686000:ud {align1}; send (1)
> +vme_wb.0<1>:ud vme_msg_0 0x08 a0.0<0,1,0>:ud
> {align1};
>
> and.z.f0.0 (1) null<1>:ud vme_wb0.0<0,1,0>:ud
> INTRAMBFLAG_MASK:ud {align1} ;
>
> diff --git a/src/shaders/vme/inter_frame_ivb.g7b
> b/src/shaders/vme/inter_frame_ivb.g7b
> index 7ed38c5..df9572f 100644
> --- a/src/shaders/vme/inter_frame_ivb.g7b
> +++ b/src/shaders/vme/inter_frame_ivb.g7b
> @@ -141,13 +141,13 @@
> { 0x00000001, 0x2fa401ad, 0x00000b04, 0x00000000 },
> { 0x00000001, 0x2fa801ad, 0x00000b24, 0x00000000 },
> { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 },
> - { 0x00000020, 0x34001c00, 0x00001400, 0x000000d0 },
> + { 0x00000020, 0x34001c00, 0x00001400, 0x000000d2 },
> { 0x00000001, 0x2ac001ad, 0x00000fe4, 0x00000000 },
> { 0x00000001, 0x2fa001ad, 0x00000ae6, 0x00000000 },
> { 0x00000001, 0x2fa401ad, 0x00000b06, 0x00000000 },
> { 0x00000001, 0x2fa801ad, 0x00000b26, 0x00000000 },
> { 0x00000040, 0x2fe00c01, 0x00001400, 0x00000020 },
> - { 0x00000020, 0x34001c00, 0x00001400, 0x000000c4 },
> + { 0x00000020, 0x34001c00, 0x00001400, 0x000000c6 },
> { 0x00000001, 0x2ac201ad, 0x00000fe4, 0x00000000 },
> { 0x0020000c, 0x2a803dad, 0x00450ac0, 0x00020002 },
> { 0x00200040, 0x2a883dad, 0x00450a80, 0x00030003 }, @@ -193,7
> +193,8 @@
> { 0x00000001, 0x24700021, 0x00000ac0, 0x00000000 },
> { 0x00000001, 0x24740021, 0x00000ac0, 0x00000000 },
> { 0x00600001, 0x28200021, 0x008d0460, 0x00000000 },
> - { 0x08600031, 0x21801cbd, 0x00000800, 0x0a686000 },
> + { 0x00000001, 0x22000060, 0x00000000, 0x0a686000 },
> + { 0x08000031, 0x21800221, 0x00000800, 0x00000200 },
> { 0x01000005, 0x20000c20, 0x00000180, 0x00002000 },
> { 0x00110020, 0x34001c00, 0x00001400, 0x0000002c },
> { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 }, diff --git
> a/src/shaders/vme/intra_frame_ivb.asm
> b/src/shaders/vme/intra_frame_ivb.asm
> index 6a009cc..9efbfdc 100644
> --- a/src/shaders/vme/intra_frame_ivb.asm
> +++ b/src/shaders/vme/intra_frame_ivb.asm
> @@ -104,20 +104,9 @@ mov (8) vme_msg_4<1>:UD 0x0 {align1};
> mov (16) vme_msg_4.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1};
> mov (1) vme_msg_4.16<1>:UD INTRA_PREDICTORE_MODE {align1};
>
> -send (8)
> - vme_msg_ind
> - vme_wb
> - null
> - vme(
> - BIND_IDX_VME,
> - 0,
> - 0,
> - VME_MESSAGE_TYPE_INTRA
> - )
> - mlen vme_msg_length
> - rlen vme_intra_wb_length
> - {align1};
> -
> +/* Use one register as the descriptor of send instruction instead of
> hardcode*/
> +mov (1) a0.0<1>:ud 0x0a184000:ud {align1}; send (1)
> +vme_wb.0<1>:ud vme_msg_0 0x08 a0.0<0,1,0>:ud
> {align1};
>
> /*
> * Oword Block Write message
> diff --git a/src/shaders/vme/intra_frame_ivb.g7b
> b/src/shaders/vme/intra_frame_ivb.g7b
> index 748cfdf..7dd16fc 100644
> --- a/src/shaders/vme/intra_frame_ivb.g7b
> +++ b/src/shaders/vme/intra_frame_ivb.g7b
> @@ -35,7 +35,8 @@
> { 0x00600001, 0x288000e1, 0x00000000, 0x00000000 },
> { 0x00800001, 0x28800231, 0x00cf03a3, 0x00000000 },
> { 0x00000001, 0x28900061, 0x00000000, 0x11111111 },
> - { 0x08600031, 0x21801cbd, 0x00000800, 0x0a184000 },
> + { 0x00000001, 0x22000060, 0x00000000, 0x0a184000 },
> + { 0x08000031, 0x21800221, 0x00000800, 0x00000200 },
> { 0x00600001, 0x28000021, 0x008d0480, 0x00000000 },
> { 0x00000001, 0x28200021, 0x00000180, 0x00000000 },
> { 0x00000001, 0x28240021, 0x00000190, 0x00000000 },
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