[Libva] [PATCH 07/13] encoding:use the qp per every macroblock on Ivy and haswell

Pengfei Qu Pengfei.Qu at intel.com
Thu Jul 7 09:17:58 UTC 2016


From: Zhao Yakui <yakui.zhao at intel.com>

v1:
combine the patch together for Ivy and haswell
use-CPU-to-construct-the-MFC-pak-command

Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
Signed-off-by: ceciliapeng <cecilia.peng at intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu at intel.com>
---
 src/gen6_mfc.c        | 15 ++++++++++++---
 src/gen6_mfc_common.c | 20 +++++++++++++++++---
 src/gen75_mfc.c       | 16 ++++++++++++----
 src/gen75_vme.c       |  9 ++++++++-
 src/gen7_vme.c        |  9 ++++++++-
 5 files changed, 57 insertions(+), 12 deletions(-)

diff --git a/src/gen6_mfc.c b/src/gen6_mfc.c
index 0208ddb..b482712 100644
--- a/src/gen6_mfc.c
+++ b/src/gen6_mfc.c
@@ -791,6 +791,7 @@ gen6_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
     int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
     int is_intra = slice_type == SLICE_TYPE_I;
     int qp_slice;
+	int qp_mb;
 
     qp_slice = qp;
     if (rate_control_mode == VA_RC_CBR) {
@@ -835,15 +836,23 @@ gen6_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
         x = i % width_in_mbs;
         y = i / width_in_mbs;
 
+        if (vme_context->roi_enabled) {
+            qp_mb = *(vme_context->qp_per_mb + i);
+        } else {
+            qp_mb = qp;
+        }
+
         if (is_intra) {
             assert(msg);
-            gen6_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, encoder_context, 0, 0, slice_batch);
+            gen6_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp_mb, msg, encoder_context, 0, 0, slice_batch);
             msg += INTRA_VME_OUTPUT_IN_DWS;
         } else {
             if (msg[0] & INTRA_MB_FLAG_MASK) {
-                gen6_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, encoder_context, 0, 0, slice_batch);
+                gen6_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp_mb, msg, encoder_context, 0, 0, slice_batch);
             } else {
-                gen6_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp, msg, offset, encoder_context, 0, 0, slice_type, slice_batch);
+                gen6_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp_mb,
+                                              msg, offset, encoder_context,
+                                              0, 0, slice_type, slice_batch);
             }
 
             msg += INTER_VME_OUTPUT_IN_DWS;
diff --git a/src/gen6_mfc_common.c b/src/gen6_mfc_common.c
index c7d406f..d452cb7 100644
--- a/src/gen6_mfc_common.c
+++ b/src/gen6_mfc_common.c
@@ -1020,7 +1020,7 @@ gen7_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx,
     struct gen6_mfc_context *mfc_context = encoder_context->mfc_context;
     VAEncPictureParameterBufferH264 *pic_param = (VAEncPictureParameterBufferH264 *)encode_state->pic_param_ext->buffer;
     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
-    int qp,qp_mb;
+    int qp,qp_mb,qp_index;
     int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
 
     if (encoder_context->rate_control_mode == VA_RC_CQP)
@@ -1078,7 +1078,13 @@ gen7_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx,
                 *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner);
                 *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
                 /* qp occupies one byte */
+                if (vme_context->roi_enabled) {
+                    qp_index = y_inner * mb_width + x_inner;
+                    qp_mb = *(vme_context->qp_per_mb + qp_index);
+                } else
+                    qp_mb = qp;
                 *command_ptr++ = qp_mb;
+
                 x_inner -= 2;
                 y_inner += 1;
             }
@@ -1124,6 +1130,11 @@ gen7_vme_walker_fill_vme_batchbuffer(VADriverContextP ctx,
                 *command_ptr++ = (mb_width << 16 | y_inner << 8 | x_inner);
                 *command_ptr++ = ((1 << 18) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
                 /* qp occupies one byte */
+                if (vme_context->roi_enabled) {
+                    qp_index = y_inner * mb_width + x_inner;
+                    qp_mb = *(vme_context->qp_per_mb + qp_index);
+                } else
+                    qp_mb = qp;
                 *command_ptr++ = qp_mb;
 
                 x_inner -= 2;
@@ -1770,7 +1781,8 @@ intel_h264_enc_roi_config(VADriverContextP ctx,
     int height_in_mbs = pSequenceParameter->picture_height_in_mbs;
 
     vme_context->roi_enabled = 0;
-    /* Restriction: Disable ROI when multi-slice is enabled */
+    encoder_context->soft_batch_force = 0;
+	/* Restriction: Disable ROI when multi-slice is enabled */
     if (!encoder_context->context_roi || (encode_state->num_slice_params_ext > 1))
         return;
 
@@ -1824,7 +1836,9 @@ intel_h264_enc_roi_config(VADriverContextP ctx,
          */
         vme_context->roi_enabled = 0;
     }
-    return;
+	if (vme_context->roi_enabled)
+        encoder_context->soft_batch_force = 1;
+	return;
 }
 
 /* HEVC */
diff --git a/src/gen75_mfc.c b/src/gen75_mfc.c
index bdce652..f69a186 100644
--- a/src/gen75_mfc.c
+++ b/src/gen75_mfc.c
@@ -1167,6 +1167,7 @@ gen75_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
     int slice_type = intel_avc_enc_slice_type_fixup(pSliceParameter->slice_type);
     int is_intra = slice_type == SLICE_TYPE_I;
     int qp_slice;
+	int qp_mb;
 
     qp_slice = qp;
     if (rate_control_mode == VA_RC_CBR) {
@@ -1210,19 +1211,26 @@ gen75_mfc_avc_pipeline_slice_programing(VADriverContextP ctx,
         y = i / width_in_mbs;
         msg = (unsigned int *) (msg_ptr + i * vme_context->vme_output.size_block);
 
+        if (vme_context->roi_enabled) {
+            qp_mb = *(vme_context->qp_per_mb + i);
+        } else
+            qp_mb = qp;
+
         if (is_intra) {
             assert(msg);
-            gen75_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, encoder_context, 0, 0, slice_batch);
+            gen75_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp_mb, msg, encoder_context, 0, 0, slice_batch);
         } else {
 	    int inter_rdo, intra_rdo;
 	    inter_rdo = msg[AVC_INTER_RDO_OFFSET] & AVC_RDO_MASK;
 	    intra_rdo = msg[AVC_INTRA_RDO_OFFSET] & AVC_RDO_MASK;
 	    offset = i * vme_context->vme_output.size_block + AVC_INTER_MV_OFFSET;
 	    if (intra_rdo < inter_rdo) { 
-                gen75_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp, msg, encoder_context, 0, 0, slice_batch);
+                gen75_mfc_avc_pak_object_intra(ctx, x, y, last_mb, qp_mb, msg, encoder_context, 0, 0, slice_batch);
             } else {
-		msg += AVC_INTER_MSG_OFFSET;
-                gen75_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp, msg, offset, encoder_context, 0, 0, slice_type, slice_batch);
+                msg += AVC_INTER_MSG_OFFSET;
+                gen75_mfc_avc_pak_object_inter(ctx, x, y, last_mb, qp_mb,
+                                               msg, offset, encoder_context,
+                                               0, 0, slice_type, slice_batch);
             }
         }
     }
diff --git a/src/gen75_vme.c b/src/gen75_vme.c
index 316c997..174a642 100644
--- a/src/gen75_vme.c
+++ b/src/gen75_vme.c
@@ -496,6 +496,7 @@ gen75_vme_fill_vme_batchbuffer(VADriverContextP ctx,
     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
     int qp;
     int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
+    int qp_mb, qp_index;
 
     if (encoder_context->rate_control_mode == VA_RC_CQP)
         qp = pic_param->pic_init_qp + slice_param->slice_qp_delta;
@@ -549,7 +550,12 @@ gen75_vme_fill_vme_batchbuffer(VADriverContextP ctx,
             *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
             *command_ptr++ = ((encoder_context->quality_level << 24) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
             /* qp occupies one byte */
-            *command_ptr++ = qp;
+            if (vme_context->roi_enabled) {
+                qp_index = mb_y * mb_width + mb_x;
+                qp_mb = *(vme_context->qp_per_mb + qp_index);
+            } else
+                qp_mb = qp;
+            *command_ptr++ = qp_mb;
 
             i += 1;
         } 
@@ -663,6 +669,7 @@ static VAStatus gen75_vme_prepare(VADriverContextP ctx,
 
     intel_vme_update_mbmv_cost(ctx, encode_state, encoder_context);
     intel_h264_initialize_mbmv_cost(ctx, encode_state, encoder_context);
+    intel_h264_enc_roi_config(ctx, encode_state, encoder_context);
 
     /*Setup all the memory object*/
     gen75_vme_surface_setup(ctx, encode_state, is_intra, encoder_context);
diff --git a/src/gen7_vme.c b/src/gen7_vme.c
index dc5b94f..79dc023 100644
--- a/src/gen7_vme.c
+++ b/src/gen7_vme.c
@@ -553,6 +553,7 @@ gen7_vme_fill_vme_batchbuffer(VADriverContextP ctx,
     VAEncSliceParameterBufferH264 *slice_param = (VAEncSliceParameterBufferH264 *)encode_state->slice_params_ext[0]->buffer;
     int qp;
     int slice_type = intel_avc_enc_slice_type_fixup(slice_param->slice_type);
+    int qp_mb, qp_index;
 
     if (encoder_context->rate_control_mode == VA_RC_CQP)
         qp = pic_param->pic_init_qp + slice_param->slice_qp_delta;
@@ -618,7 +619,13 @@ gen7_vme_fill_vme_batchbuffer(VADriverContextP ctx,
                 *command_ptr++ = (mb_width << 16 | mb_y << 8 | mb_x);
                 *command_ptr++ = ((encoder_context->quality_level << 24) | (1 << 16) | transform_8x8_mode_flag | (mb_intra_ub << 8));
 
-                *command_ptr++ = qp;
+                if (vme_context->roi_enabled) {
+                    qp_index = mb_y * mb_width + mb_x;
+                    qp_mb = *(vme_context->qp_per_mb + qp_index);
+                } else
+                    qp_mb = qp;
+                *command_ptr++ = qp_mb;
+
                 i += 1;
             }
 
-- 
2.7.4



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