[Libva] [PATCH 14/14] QP difference configuration for adjacent IP and PB frames

[Pengfei Qu]

From: Jia Meng <jia.meng at intel.com>

Signed-off-by: Jia Meng <jia.meng at intel.com>
Signed-off-by: Pengfei Qu <Pengfei.Qu at intel.com>
---
 src/gen6_mfc.h        |  4 ++++
 src/gen6_mfc_common.c | 41 +++++++++++++++++++++++++++++------------
 2 files changed, 33 insertions(+), 12 deletions(-)

diff --git a/src/gen6_mfc.h b/src/gen6_mfc.h
index 4561d43..47e4efc 100644
--- a/src/gen6_mfc.h
+++ b/src/gen6_mfc.h
@@ -244,6 +244,10 @@ struct gen6_mfc_context
         int saved_intra_period;
         int saved_ip_period;
         int saved_idr_period;
+
+        unsigned int QpDiffIP;
+        unsigned int QpDiffPB;
+        unsigned int QpDiffIB;
     } brc;
 
     struct {
diff --git a/src/gen6_mfc_common.c b/src/gen6_mfc_common.c
index 45b0e8b..b904387 100644
--- a/src/gen6_mfc_common.c
+++ b/src/gen6_mfc_common.c
@@ -77,6 +77,9 @@ intel_mfc_bit_rate_control_context_init(struct encode_state *encode_state,
     int inter_mb_size = pSequenceParameter->bits_per_second * 1.0 / (fps+4.0) / width_in_mbs / height_in_mbs;
     int intra_mb_size = inter_mb_size * 5.0;
     int i;
+    struct buffer_store *pMiscParam = NULL;
+    VAEncMiscParameterBuffer* pMiscParamBuf = NULL;
+    VAEncMiscParameterRateControl* pMiscParamRC = NULL;
 
     mfc_context->bit_rate_control_context[SLICE_TYPE_I].target_mb_size = intra_mb_size;
     mfc_context->bit_rate_control_context[SLICE_TYPE_I].target_frame_size = intra_mb_size * width_in_mbs * height_in_mbs;
@@ -85,6 +88,19 @@ intel_mfc_bit_rate_control_context_init(struct encode_state *encode_state,
     mfc_context->bit_rate_control_context[SLICE_TYPE_B].target_mb_size = inter_mb_size;
     mfc_context->bit_rate_control_context[SLICE_TYPE_B].target_frame_size = inter_mb_size * width_in_mbs * height_in_mbs;
 
+    pMiscParam = encode_state->misc_param[VAEncMiscParameterTypeRateControl];
+    if (pMiscParam
+        && (pMiscParamBuf = (VAEncMiscParameterBuffer *)(pMiscParam->buffer)))
+        pMiscParamRC = (VAEncMiscParameterRateControl *)pMiscParamBuf->data;
+    if (pMiscParamRC) {
+        mfc_context->brc.QpDiffIP = pMiscParamRC->qp_diff_ip;
+        mfc_context->brc.QpDiffPB = pMiscParamRC->qp_diff_pb;
+    } else {
+        mfc_context->brc.QpDiffIP = BRC_I_P_QP_DIFF;
+        mfc_context->brc.QpDiffPB = BRC_P_B_QP_DIFF;
+    }
+    mfc_context->brc.QpDiffIB = BRC_I_P_QP_DIFF + BRC_P_B_QP_DIFF;
+
     for(i = 0 ; i < 3; i++) {
         mfc_context->bit_rate_control_context[i].QpPrimeY = 26;
         mfc_context->bit_rate_control_context[i].MaxQpNegModifier = 6;
@@ -283,20 +299,21 @@ int intel_mfc_brc_postpack(struct encode_state *encode_state,
     if (sts == BRC_NO_HRD_VIOLATION) { // no HRD violation
         /* correcting QPs of slices of other types */
         if (slicetype == SLICE_TYPE_P) {
-            if (abs(qpn + BRC_P_B_QP_DIFF - qpb) > 2)
-                mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY += (qpn + BRC_P_B_QP_DIFF - qpb) >> 1;
-            if (abs(qpn - BRC_I_P_QP_DIFF - qpi) > 2)
-                mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY += (qpn - BRC_I_P_QP_DIFF - qpi) >> 1;
+            if (abs(qpn + mfc_context->brc.QpDiffPB - qpb) > 2)
+                mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY += (int)(qpn + mfc_context->brc.QpDiffPB - qpb) >> 1;
+            if (abs(qpn - mfc_context->brc.QpDiffIP - qpi) > 2) {
+                mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY += (int)(qpn - mfc_context->brc.QpDiffIP - qpi) >> 1;
+            }
         } else if (slicetype == SLICE_TYPE_I) {
-            if (abs(qpn + BRC_I_B_QP_DIFF - qpb) > 4)
-                mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY += (qpn + BRC_I_B_QP_DIFF - qpb) >> 2;
-            if (abs(qpn + BRC_I_P_QP_DIFF - qpp) > 2)
-                mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY += (qpn + BRC_I_P_QP_DIFF - qpp) >> 2;
+            if (abs(qpn + mfc_context->brc.QpDiffIB - qpb) > 4)
+                mfc_context->bit_rate_control_context[SLICE_TYPE_B].QpPrimeY += (int)(qpn + mfc_context->brc.QpDiffIB - qpb) >> 2;
+            if (abs(qpn + mfc_context->brc.QpDiffIP - qpp) > 2)
+                mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY += (int)(qpn + mfc_context->brc.QpDiffIP - qpp) >> 2;
         } else { // SLICE_TYPE_B
-            if (abs(qpn - BRC_P_B_QP_DIFF - qpp) > 2)
-                mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY += (qpn - BRC_P_B_QP_DIFF - qpp) >> 1;
-            if (abs(qpn - BRC_I_B_QP_DIFF - qpi) > 4)
-                mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY += (qpn - BRC_I_B_QP_DIFF - qpi) >> 2;
+            if (abs(qpn - mfc_context->brc.QpDiffPB - qpp) > 2)
+                mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY += (int)(qpn - mfc_context->brc.QpDiffPB - qpp) >> 1;
+            if (abs(qpn - mfc_context->brc.QpDiffIB - qpi) > 4)
+                mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY += (int)(qpn - mfc_context->brc.QpDiffIB - qpi) >> 2;
         }
         BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_I].QpPrimeY, 1, 51);
         BRC_CLIP(mfc_context->bit_rate_control_context[SLICE_TYPE_P].QpPrimeY, 1, 51);
-- 
2.7.4