[Libva] [Libva-intel-driver][PATCH v2 13/17] Rename gen9_gpe_mi_store_register_mem() to gen8_gpe_mi_load_register_mem()

[Zhao Yakui]

On 11/18/2016 01:43 PM, Xiang, Haihao wrote:
> This function can be used on GEN8 too

The patch looks good to me.

But please change the title to "gen8_gpe_mi_store_register_mem" instead 
of gen8_gpe_mi_load_register_mem

Thanks.
>
> Signed-off-by: Xiang, Haihao<haihao.xiang at intel.com>
> ---
>   src/gen9_vdenc.c       | 10 +++++-----
>   src/gen9_vp9_encoder.c | 10 +++++-----
>   src/i965_gpe_utils.c   |  2 +-
>   src/i965_gpe_utils.h   |  2 +-
>   4 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/src/gen9_vdenc.c b/src/gen9_vdenc.c
> index 35373f3..c8cdca0 100644
> --- a/src/gen9_vdenc.c
> +++ b/src/gen9_vdenc.c
> @@ -1508,7 +1508,7 @@ gen9_vdenc_huc_store_huc_status2(VADriverContextP ctx,
>       mi_store_register_mem_params.mmio_offset = VCS0_HUC_STATUS2;
>       mi_store_register_mem_params.bo = vdenc_context->huc_status2_res.bo;
>       mi_store_register_mem_params.offset = 4;
> -    gen9_gpe_mi_store_register_mem(ctx, batch,&mi_store_register_mem_params);
> +    gen8_gpe_mi_store_register_mem(ctx, batch,&mi_store_register_mem_params);
>   }
>
>   static void
> @@ -2356,7 +2356,7 @@ gen9_vdenc_huc_brc_update(VADriverContextP ctx,
>       memset(&mi_store_register_mem_params, 0, sizeof(mi_store_register_mem_params));
>       mi_store_register_mem_params.mmio_offset = VCS0_HUC_STATUS;
>       mi_store_register_mem_params.bo = vdenc_context->huc_status_res.bo;
> -    gen9_gpe_mi_store_register_mem(ctx, batch,&mi_store_register_mem_params);
> +    gen8_gpe_mi_store_register_mem(ctx, batch,&mi_store_register_mem_params);
>
>       /* Write HUC_STATUS mask (1<<  31) */
>       memset(&mi_store_data_imm_params, 0, sizeof(mi_store_data_imm_params));
> @@ -3508,19 +3508,19 @@ gen9_vdenc_read_status(VADriverContextP ctx, struct intel_encoder_context *encod
>       mi_store_register_mem_params.mmio_offset = MFC_BITSTREAM_BYTECOUNT_FRAME_REG; /* TODO: fix it if VDBOX2 is used */
>       mi_store_register_mem_params.bo = vdenc_context->status_bffuer.res.bo;
>       mi_store_register_mem_params.offset = base_offset + vdenc_context->status_bffuer.bytes_per_frame_offset;
> -    gen9_gpe_mi_store_register_mem(ctx, batch,&mi_store_register_mem_params);
> +    gen8_gpe_mi_store_register_mem(ctx, batch,&mi_store_register_mem_params);
>
>       /* Update DMEM buffer for BRC Update */
>       for (i = 0; i<  NUM_OF_BRC_PAK_PASSES; i++) {
>           mi_store_register_mem_params.mmio_offset = MFC_BITSTREAM_BYTECOUNT_FRAME_REG; /* TODO: fix it if VDBOX2 is used */
>           mi_store_register_mem_params.bo = vdenc_context->brc_update_dmem_res[i].bo;
>           mi_store_register_mem_params.offset = 5 * sizeof(uint32_t);
> -        gen9_gpe_mi_store_register_mem(ctx, batch,&mi_store_register_mem_params);
> +        gen8_gpe_mi_store_register_mem(ctx, batch,&mi_store_register_mem_params);
>
>           mi_store_register_mem_params.mmio_offset = MFC_IMAGE_STATUS_CTRL_REG; /* TODO: fix it if VDBOX2 is used */
>           mi_store_register_mem_params.bo = vdenc_context->brc_update_dmem_res[i].bo;
>           mi_store_register_mem_params.offset = 7 * sizeof(uint32_t);
> -        gen9_gpe_mi_store_register_mem(ctx, batch,&mi_store_register_mem_params);
> +        gen8_gpe_mi_store_register_mem(ctx, batch,&mi_store_register_mem_params);
>       }
>   }
>
> diff --git a/src/gen9_vp9_encoder.c b/src/gen9_vp9_encoder.c
> index 98ae3ca..74d0d2f 100644
> --- a/src/gen9_vp9_encoder.c
> +++ b/src/gen9_vp9_encoder.c
> @@ -5679,31 +5679,31 @@ gen9_vp9_read_mfc_status(VADriverContextP ctx, struct intel_encoder_context *enc
>       mi_store_reg_mem_param.bo = status_buffer->bo;
>       mi_store_reg_mem_param.offset = status_buffer->bs_byte_count_offset;
>       mi_store_reg_mem_param.mmio_offset = status_buffer->vp9_bs_frame_reg_offset;
> -    gen9_gpe_mi_store_register_mem(ctx, batch,&mi_store_reg_mem_param);
> +    gen8_gpe_mi_store_register_mem(ctx, batch,&mi_store_reg_mem_param);
>
>       mi_store_reg_mem_param.bo = pak_context->res_brc_bitstream_size_buffer.bo;
>       mi_store_reg_mem_param.offset = 0;
>       mi_store_reg_mem_param.mmio_offset = status_buffer->vp9_bs_frame_reg_offset;
> -    gen9_gpe_mi_store_register_mem(ctx, batch,&mi_store_reg_mem_param);
> +    gen8_gpe_mi_store_register_mem(ctx, batch,&mi_store_reg_mem_param);
>
>       /* Read HCP Image status */
>       mi_store_reg_mem_param.bo = status_buffer->bo;
>       mi_store_reg_mem_param.offset = status_buffer->image_status_mask_offset;
>       mi_store_reg_mem_param.mmio_offset =
>                                  status_buffer->vp9_image_mask_reg_offset;
> -    gen9_gpe_mi_store_register_mem(ctx, batch,&mi_store_reg_mem_param);
> +    gen8_gpe_mi_store_register_mem(ctx, batch,&mi_store_reg_mem_param);
>
>       mi_store_reg_mem_param.bo = status_buffer->bo;
>       mi_store_reg_mem_param.offset = status_buffer->image_status_ctrl_offset;
>       mi_store_reg_mem_param.mmio_offset =
>                                  status_buffer->vp9_image_ctrl_reg_offset;
> -    gen9_gpe_mi_store_register_mem(ctx, batch,&mi_store_reg_mem_param);
> +    gen8_gpe_mi_store_register_mem(ctx, batch,&mi_store_reg_mem_param);
>
>       mi_store_reg_mem_param.bo = pak_context->res_brc_bitstream_size_buffer.bo;
>       mi_store_reg_mem_param.offset = 4;
>       mi_store_reg_mem_param.mmio_offset =
>                                  status_buffer->vp9_image_ctrl_reg_offset;
> -    gen9_gpe_mi_store_register_mem(ctx, batch,&mi_store_reg_mem_param);
> +    gen8_gpe_mi_store_register_mem(ctx, batch,&mi_store_reg_mem_param);
>
>       gen8_gpe_mi_flush_dw(ctx, batch,&mi_flush_dw_param);
>
> diff --git a/src/i965_gpe_utils.c b/src/i965_gpe_utils.c
> index 2f328f9..4c0384e 100644
> --- a/src/i965_gpe_utils.c
> +++ b/src/i965_gpe_utils.c
> @@ -1535,7 +1535,7 @@ gen8_gpe_mi_store_data_imm(VADriverContextP ctx,
>   }
>
>   void
> -gen9_gpe_mi_store_register_mem(VADriverContextP ctx,
> +gen8_gpe_mi_store_register_mem(VADriverContextP ctx,
>                                  struct intel_batchbuffer *batch,
>                                  struct gpe_mi_store_register_mem_parameter *params)
>   {
> diff --git a/src/i965_gpe_utils.h b/src/i965_gpe_utils.h
> index 517f353..1a3210b 100644
> --- a/src/i965_gpe_utils.h
> +++ b/src/i965_gpe_utils.h
> @@ -370,7 +370,7 @@ void gen8_gpe_mi_store_data_imm(VADriverContextP ctx,
>                                   struct intel_batchbuffer *batch,
>                                   struct gpe_mi_store_data_imm_parameter *params);
>
> -void gen9_gpe_mi_store_register_mem(VADriverContextP ctx,
> +void gen8_gpe_mi_store_register_mem(VADriverContextP ctx,
>                                       struct intel_batchbuffer *batch,
>                                       struct gpe_mi_store_register_mem_parameter *params);
>