[Libva] [Libva-intel-driver][PATCH 2/2] Add a function table for used GPE functions
Zhao Yakui
yakui.zhao at intel.com
Wed Nov 30 00:41:40 UTC 2016
On 11/29/2016 02:19 PM, Xiang, Haihao wrote:
> It is useful for sharing GPE based code between different platforms
> Currently it is available on GEN8+
Good idea. After it is abstracted, the function related with GPE can be
called like the following:
gpe->context_init()
gpe->reset_bindind_table()
and so on.
This patch looks fine to me.
Add: Reviewed-by: Zhao Yakui <yakui.zhao at intel.com>
>
> Signed-off-by: Xiang, Haihao<haihao.xiang at intel.com>
> ---
> src/gen6_mfc.h | 2 +-
> src/i965_drv_video.c | 6 ++++
> src/i965_drv_video.h | 3 ++
> src/i965_gpe_utils.c | 72 ++++++++++++++++++++++++++++++++++++++++
> src/i965_gpe_utils.h | 92 +++++++++++++++++++++++++++++++++++++++++++++++++++-
> 5 files changed, 173 insertions(+), 2 deletions(-)
>
> diff --git a/src/gen6_mfc.h b/src/gen6_mfc.h
> index 30b5fd9..290922b 100644
> --- a/src/gen6_mfc.h
> +++ b/src/gen6_mfc.h
> @@ -33,8 +33,8 @@
> #include<i915_drm.h>
> #include<intel_bufmgr.h>
>
> -#include "i965_gpe_utils.h"
> #include "i965_encoder.h"
> +#include "i965_gpe_utils.h"
>
> struct encode_state;
>
> diff --git a/src/i965_drv_video.c b/src/i965_drv_video.c
> index 2b0684e..79a2aec 100644
> --- a/src/i965_drv_video.c
> +++ b/src/i965_drv_video.c
> @@ -6498,6 +6498,12 @@ struct {
> VA_DISPLAY_X11,
> },
> #endif
> +
> + {
> + i965_gpe_table_init,
> + i965_gpe_table_terminate,
> + 0,
> + },
> };
>
> static bool
> diff --git a/src/i965_drv_video.h b/src/i965_drv_video.h
> index d928d30..7cba3a3 100644
> --- a/src/i965_drv_video.h
> +++ b/src/i965_drv_video.h
> @@ -498,6 +498,7 @@ struct hw_codec_info
>
>
> #include "i965_render.h"
> +#include "i965_gpe_utils.h"
>
> struct i965_driver_data
> {
> @@ -534,6 +535,8 @@ struct i965_driver_data
> struct va_wl_output *wl_output;
>
> VADriverContextP wrapper_pdrvctx;
> +
> + struct i965_gpe_table gpe_table;
> };
>
> #define NEW_CONFIG_ID() object_heap_allocate(&i965->config_heap);
> diff --git a/src/i965_gpe_utils.c b/src/i965_gpe_utils.c
> index d0eab7f..548cbf4 100644
> --- a/src/i965_gpe_utils.c
> +++ b/src/i965_gpe_utils.c
> @@ -32,6 +32,7 @@
> #include "intel_batchbuffer.h"
> #include "intel_driver.h"
>
> +#include "i965_drv_video.h"
> #include "i965_gpe_utils.h"
>
> static void
> @@ -220,6 +221,14 @@ gen6_gpe_pipeline_setup(VADriverContextP ctx,
> }
>
> static void
> +gen8_gpe_pipeline_end(VADriverContextP ctx,
> + struct i965_gpe_context *gpe_context,
> + struct intel_batchbuffer *batch)
> +{
> + /* No thing to do */
> +}
> +
> +static void
> i965_gpe_set_surface_tiling(struct i965_surface_state *ss, unsigned int tiling)
> {
> switch (tiling) {
> @@ -2513,3 +2522,66 @@ gen8_gpe_pipe_control(VADriverContextP ctx,
> __OUT_BATCH(batch, param->dw0);
> __OUT_BATCH(batch, param->dw1);
> }
> +
> +bool
> +i965_gpe_table_init(VADriverContextP ctx)
> +{
> + struct i965_driver_data *i965 = i965_driver_data(ctx);
> + struct i965_gpe_table *gpe =&i965->gpe_table;
> +
> + if (IS_GEN8(i965->intel.device_info)) {
> + gpe->context_init = gen8_gpe_context_init;
> + gpe->context_destroy = gen8_gpe_context_destroy;
> + gpe->context_add_surface = gen8_gpe_context_add_surface;
> + gpe->reset_binding_table = gen8_gpe_reset_binding_table;
> + gpe->load_kernels = gen8_gpe_load_kernels;
> + gpe->setup_interface_data = gen8_gpe_setup_interface_data;
> + gpe->set_dynamic_buffer = gen8_gpe_context_set_dynamic_buffer;
> + gpe->media_object = gen8_gpe_media_object;
> + gpe->media_object_walker = gen8_gpe_media_object_walker;
> + gpe->media_state_flush = gen8_gpe_media_state_flush;
> + gpe->pipe_control = gen8_gpe_pipe_control;
> + gpe->pipeline_end = gen8_gpe_pipeline_end;
> + gpe->pipeline_setup = gen8_gpe_pipeline_setup;
> + gpe->mi_conditional_batch_buffer_end = gen8_gpe_mi_conditional_batch_buffer_end;
> + gpe->mi_batch_buffer_start = gen8_gpe_mi_batch_buffer_start;
> + gpe->mi_load_register_reg = gen8_gpe_mi_load_register_reg;
> + gpe->mi_load_register_imm = gen8_gpe_mi_load_register_imm;
> + gpe->mi_load_register_mem = gen8_gpe_mi_load_register_mem;
> + gpe->mi_store_register_mem = gen8_gpe_mi_store_register_mem;
> + gpe->mi_store_data_imm =gen8_gpe_mi_store_data_imm;
> + gpe->mi_flush_dw = gen8_gpe_mi_flush_dw;
> + } else if (IS_GEN9(i965->intel.device_info)) {
> + gpe->context_init = gen8_gpe_context_init;
> + gpe->context_destroy = gen8_gpe_context_destroy;
> + gpe->context_add_surface = gen9_gpe_context_add_surface;
> + gpe->reset_binding_table = gen9_gpe_reset_binding_table;
> + gpe->load_kernels = gen8_gpe_load_kernels;
> + gpe->setup_interface_data = gen8_gpe_setup_interface_data;
> + gpe->set_dynamic_buffer = gen8_gpe_context_set_dynamic_buffer;
> + gpe->media_object = gen8_gpe_media_object;
> + gpe->media_object_walker = gen8_gpe_media_object_walker;
> + gpe->media_state_flush = gen8_gpe_media_state_flush;
> + gpe->pipe_control = gen8_gpe_pipe_control;
> + gpe->pipeline_end = gen9_gpe_pipeline_end;
> + gpe->pipeline_setup = gen9_gpe_pipeline_setup;
> + gpe->mi_conditional_batch_buffer_end = gen9_gpe_mi_conditional_batch_buffer_end;
> + gpe->mi_batch_buffer_start = gen8_gpe_mi_batch_buffer_start;
> + gpe->mi_load_register_reg = gen8_gpe_mi_load_register_reg;
> + gpe->mi_load_register_imm = gen8_gpe_mi_load_register_imm;
> + gpe->mi_load_register_mem = gen8_gpe_mi_load_register_mem;
> + gpe->mi_store_register_mem = gen8_gpe_mi_store_register_mem;
> + gpe->mi_store_data_imm =gen8_gpe_mi_store_data_imm;
> + gpe->mi_flush_dw = gen8_gpe_mi_flush_dw;
> + } else {
> + // TODO: for other platforms
> + }
> +
> + return true;
> +}
> +
> +void
> +i965_gpe_table_terminate(VADriverContextP ctx)
> +{
> +
> +}
> diff --git a/src/i965_gpe_utils.h b/src/i965_gpe_utils.h
> index 667ebf2..52097d3 100644
> --- a/src/i965_gpe_utils.h
> +++ b/src/i965_gpe_utils.h
> @@ -31,7 +31,6 @@
> #include<intel_bufmgr.h>
>
> #include "i965_defines.h"
> -#include "i965_drv_video.h"
> #include "i965_structs.h"
>
> #define MAX_GPE_KERNELS 32
> @@ -556,4 +555,95 @@ gen8_gpe_pipe_control(VADriverContextP ctx,
> struct intel_batchbuffer *batch,
> struct gpe_pipe_control_parameter *param);
>
> +struct i965_gpe_table
> +{
> + void (*context_init)(VADriverContextP ctx,
> + struct i965_gpe_context *gpe_context);
> +
> + void (*context_destroy)(struct i965_gpe_context *gpe_context);
> +
> + void (*context_add_surface)(struct i965_gpe_context *gpe_context,
> + struct i965_gpe_surface *gpe_surface,
> + int index);
> +
> + void (*reset_binding_table)(VADriverContextP ctx, struct i965_gpe_context *gpe_context);
> +
> + void (*load_kernels)(VADriverContextP ctx,
> + struct i965_gpe_context *gpe_context,
> + struct i965_kernel *kernel_list,
> + unsigned int num_kernels);
> +
> + void (*setup_interface_data)(VADriverContextP ctx, struct i965_gpe_context *gpe_context);
> +
> + void (*set_dynamic_buffer)(VADriverContextP ctx,
> + struct i965_gpe_context *gpe_context,
> + struct gpe_dynamic_state_parameter *ds);
> +
> + void (*media_object)(VADriverContextP ctx,
> + struct i965_gpe_context *gpe_context,
> + struct intel_batchbuffer *batch,
> + struct gpe_media_object_parameter *param);
> +
> + void (*media_object_walker)(VADriverContextP ctx,
> + struct i965_gpe_context *gpe_context,
> + struct intel_batchbuffer *batch,
> + struct gpe_media_object_walker_parameter *param);
> +
> + void (*media_state_flush)(VADriverContextP ctx,
> + struct i965_gpe_context *gpe_context,
> + struct intel_batchbuffer *batch);
> +
> +
> + void (*pipe_control)(VADriverContextP ctx,
> + struct intel_batchbuffer *batch,
> + struct gpe_pipe_control_parameter *param);
> +
> + void (*pipeline_end)(VADriverContextP ctx,
> + struct i965_gpe_context *gpe_context,
> + struct intel_batchbuffer *batch); // only available on gen9+
> +
> + void (*pipeline_setup)(VADriverContextP ctx,
> + struct i965_gpe_context *gpe_context,
> + struct intel_batchbuffer *batch);
> +
> + void (*mi_conditional_batch_buffer_end)(VADriverContextP ctx,
> + struct intel_batchbuffer *batch,
> + struct gpe_mi_conditional_batch_buffer_end_parameter *param);
> +
> + void (*mi_batch_buffer_start)(VADriverContextP ctx,
> + struct intel_batchbuffer *batch,
> + struct gpe_mi_batch_buffer_start_parameter *params);
> +
> + void (*mi_load_register_reg)(VADriverContextP ctx,
> + struct intel_batchbuffer *batch,
> + struct gpe_mi_load_register_reg_parameter *params);
> +
> + void (*mi_load_register_imm)(VADriverContextP ctx,
> + struct intel_batchbuffer *batch,
> + struct gpe_mi_load_register_imm_parameter *params);
> +
> + void (*mi_load_register_mem)(VADriverContextP ctx,
> + struct intel_batchbuffer *batch,
> + struct gpe_mi_load_register_mem_parameter *params);
> +
> +
> + void (*mi_store_register_mem)(VADriverContextP ctx,
> + struct intel_batchbuffer *batch,
> + struct gpe_mi_store_register_mem_parameter *params);
> +
> + void (*mi_store_data_imm)(VADriverContextP ctx,
> + struct intel_batchbuffer *batch,
> + struct gpe_mi_store_data_imm_parameter *params);
> +
> + void (*mi_flush_dw)(VADriverContextP ctx,
> + struct intel_batchbuffer *batch,
> + struct gpe_mi_flush_dw_parameter *params);
> +};
> +
> +extern bool
> +i965_gpe_table_init(VADriverContextP ctx);
> +
> +extern void
> +i965_gpe_table_terminate(VADriverContextP ctx);
> +
> #endif /* _I965_GPE_UTILS_H_ */
More information about the Libva
mailing list