[Libva] [PATCH V3: 4/4] HEVC10bit ENC: work around gpu hang when p010->nv12

[Zhao Yakui]

On 09/06/2016 08:09 AM, Pengfei Qu wrote:
> Signed-off-by: Pengfei Qu<Pengfei.Qu at intel.com>

This looks good to me.

Add: Reviewed-by: Zhao Yakui <yakui.zhao at intel.com>

> ---
>   src/gen9_vme.c       | 1 +
>   src/i965_drv_video.h | 2 ++
>   2 files changed, 3 insertions(+)
>
> diff --git a/src/gen9_vme.c b/src/gen9_vme.c
> index 9e66275..264b27d 100644
> --- a/src/gen9_vme.c
> +++ b/src/gen9_vme.c
> @@ -1839,6 +1839,7 @@ static VAStatus gen9_intel_init_hevc_surface(VADriverContextP ctx,
>               &rect);
>           assert(status == VA_STATUS_SUCCESS);
>           hevc_encoder_surface->has_p010_to_nv12_done = 1;
> +        i965_SyncSurface(ctx,hevc_encoder_surface->nv12_surface_id);
>       }
>       return VA_STATUS_SUCCESS;
>   }
> diff --git a/src/i965_drv_video.h b/src/i965_drv_video.h
> index d9644a7..77e32d8 100644
> --- a/src/i965_drv_video.h
> +++ b/src/i965_drv_video.h
> @@ -553,6 +553,8 @@ extern VAStatus i965_CreateSurfaces(VADriverContextP ctx,
>                       int format,
>                       int num_surfaces,
>                       VASurfaceID *surfaces);
> +extern VAStatus i965_SyncSurface(VADriverContextP ctx,
> +                    VASurfaceID render_target);
>
>   #define I965_SURFACE_MEM_NATIVE             0
>   #define I965_SURFACE_MEM_GEM_FLINK          1