[Libva] [PATCH 4/4] Set the pipeline to use the new VP8 encoding shaders on SKL/BXT/KBL
Sean V Kelley
seanvk at posteo.de
Tue Jan 10 22:02:02 UTC 2017
From: "Xiang, Haihao" <haihao.xiang at intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang at intel.com>
Reviewed-by: Sean V Kelley <seanvk at posteo.de>
---
src/Makefile.am | 1 +
src/gen9_encoder_vp8.c | 142 +++++++++++++++++++++++++++++++++++++++++++++++++
src/gen9_mfc.c | 4 ++
src/gen9_vme.c | 4 ++
src/i965_encoder_vp8.c | 7 ++-
5 files changed, 157 insertions(+), 1 deletion(-)
create mode 100644 src/gen9_encoder_vp8.c
diff --git a/src/Makefile.am b/src/Makefile.am
index 7980836e..6ffd0aff 100755
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -63,6 +63,7 @@ source_c = \
gen8_mfc.c \
gen8_mfd.c \
gen8_vme.c \
+ gen9_encoder_vp8.c \
gen9_vme.c \
gen9_mfc.c \
gen9_mfc_hevc.c \
diff --git a/src/gen9_encoder_vp8.c b/src/gen9_encoder_vp8.c
new file mode 100644
index 00000000..23c40065
--- /dev/null
+++ b/src/gen9_encoder_vp8.c
@@ -0,0 +1,142 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
+ * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
+ * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
+ * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
+ * SOFTWAR
+ *
+ * Authors:
+ * Xiang, Haihao <haihao.xiang at intel.com>
+ *
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include <string.h>
+#include <math.h>
+#include <assert.h>
+
+#include "intel_batchbuffer.h"
+#include "intel_driver.h"
+
+#include "i965_defines.h"
+#include "i965_drv_video.h"
+#include "i965_encoder.h"
+#include "i965_encoder_vp8.h"
+
+#define DEFAULT_MOCS 0x02
+
+extern struct i965_kernel vp8_kernels_brc_init_reset[NUM_VP8_BRC_RESET];
+extern struct i965_kernel vp8_kernels_scaling[NUM_VP8_SCALING];
+extern struct i965_kernel vp8_kernels_me[NUM_VP8_ME];
+extern struct i965_kernel vp8_kernels_mbenc[NUM_VP8_MBENC];
+extern struct i965_kernel vp8_kernels_mpu[NUM_VP8_MPU];
+extern struct i965_kernel vp8_kernels_tpu[NUM_VP8_TPU];
+extern struct i965_kernel vp8_kernels_brc_update[NUM_VP8_BRC_UPDATE];
+
+static const uint32_t gen9_brc_init_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_brc_init_genx_0.g9b"
+};
+
+static const uint32_t gen9_brc_reset_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_brc_reset_genx_0.g9b"
+};
+
+static const uint32_t gen9_scaling_bin_vp8[][4] = {
+#include "shaders/brc/skl/hme_downscale_genx_0.g9b"
+};
+
+static const uint32_t gen9_me_bin_vp8[][4] = {
+#include "shaders/brc/skl/hme_genx_0.g9b"
+};
+
+static const uint32_t gen9_mbenc_i_frame_dist_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_intra_distortion_genx_0.g9b"
+};
+
+static const uint32_t gen9_mbenc_i_frame_luma_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_enc_genx_0.g9b"
+};
+
+static const uint32_t gen9_mbenc_i_frame_chroma_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_enc_genx_1.g9b"
+};
+
+static const uint32_t gen9_mbenc_p_frame_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_enc_genx_2.g9b"
+};
+
+static const uint32_t gen9_mpu_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_mpu_genx_0.g9b"
+};
+
+static const uint32_t gen9_tpu_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_tpu_genx_0.g9b"
+};
+
+static const uint32_t gen9_brc_update_bin_vp8[][4] = {
+#include "shaders/brc/skl/vp8_brc_update_genx_0.g9b"
+};
+
+Bool
+gen9_encoder_vp8_context_init(VADriverContextP ctx,
+ struct intel_encoder_context *encoder_context,
+ struct i965_encoder_vp8_context *vp8_context)
+{
+ vp8_kernels_brc_init_reset[VP8_BRC_INIT].bin = gen9_brc_init_bin_vp8;
+ vp8_kernels_brc_init_reset[VP8_BRC_INIT].size = sizeof(gen9_brc_init_bin_vp8);
+ vp8_kernels_brc_init_reset[VP8_BRC_RESET].bin = gen9_brc_reset_bin_vp8;
+ vp8_kernels_brc_init_reset[VP8_BRC_RESET].size = sizeof(gen9_brc_reset_bin_vp8);
+
+ /* scaling 4x and 16x use the same kernel */
+ vp8_kernels_scaling[VP8_SCALING_4X].bin = gen9_scaling_bin_vp8;
+ vp8_kernels_scaling[VP8_SCALING_4X].size = sizeof(gen9_scaling_bin_vp8);
+ vp8_kernels_scaling[VP8_SCALING_16X].bin = gen9_scaling_bin_vp8;
+ vp8_kernels_scaling[VP8_SCALING_16X].size = sizeof(gen9_scaling_bin_vp8);
+
+ /* me 4x and 16x use the same kernel */
+ vp8_kernels_me[VP8_ME_4X].bin = gen9_me_bin_vp8;
+ vp8_kernels_me[VP8_ME_4X].size = sizeof(gen9_me_bin_vp8);
+ vp8_kernels_me[VP8_ME_16X].bin = gen9_me_bin_vp8;
+ vp8_kernels_me[VP8_ME_16X].size = sizeof(gen9_me_bin_vp8);
+
+ vp8_kernels_mbenc[VP8_MBENC_I_FRAME_DIST].bin = gen9_mbenc_i_frame_dist_bin_vp8;
+ vp8_kernels_mbenc[VP8_MBENC_I_FRAME_DIST].size = sizeof(gen9_mbenc_i_frame_dist_bin_vp8);
+ vp8_kernels_mbenc[VP8_MBENC_I_FRAME_LUMA].bin = gen9_mbenc_i_frame_luma_bin_vp8;
+ vp8_kernels_mbenc[VP8_MBENC_I_FRAME_LUMA].size = sizeof(gen9_mbenc_i_frame_luma_bin_vp8);
+ vp8_kernels_mbenc[VP8_MBENC_I_FRAME_CHROMA].bin = gen9_mbenc_i_frame_chroma_bin_vp8;
+ vp8_kernels_mbenc[VP8_MBENC_I_FRAME_CHROMA].size = sizeof(gen9_mbenc_i_frame_chroma_bin_vp8);
+ vp8_kernels_mbenc[VP8_MBENC_P_FRAME].bin = gen9_mbenc_p_frame_bin_vp8;
+ vp8_kernels_mbenc[VP8_MBENC_P_FRAME].size = sizeof(gen9_mbenc_p_frame_bin_vp8);
+
+ vp8_kernels_mpu[VP8_MPU].bin = gen9_mpu_bin_vp8;
+ vp8_kernels_mpu[VP8_MPU].size = sizeof(gen9_mpu_bin_vp8);
+
+ vp8_kernels_brc_update[VP8_BRC_UPDATE].bin = gen9_brc_update_bin_vp8;
+ vp8_kernels_brc_update[VP8_BRC_UPDATE].size = sizeof(gen9_brc_update_bin_vp8);
+
+ vp8_kernels_tpu[VP8_TPU].bin = gen9_tpu_bin_vp8;
+ vp8_kernels_tpu[VP8_TPU].size = sizeof(gen9_tpu_bin_vp8);
+
+ vp8_context->idrt_entry_size = ALIGN(sizeof(struct gen8_interface_descriptor_data), 64);
+ vp8_context->mocs = DEFAULT_MOCS;
+
+ return True;
+}
diff --git a/src/gen9_mfc.c b/src/gen9_mfc.c
index ce038b1f..55ed9ce9 100644
--- a/src/gen9_mfc.c
+++ b/src/gen9_mfc.c
@@ -43,10 +43,14 @@
#include "gen9_vdenc.h"
#include "gen9_vp9_encapi.h"
+extern Bool i965_encoder_vp8_pak_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context);
+
Bool gen9_mfc_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
{
switch (encoder_context->codec) {
case CODEC_VP8:
+ return i965_encoder_vp8_pak_context_init(ctx, encoder_context);
+
case CODEC_MPEG2:
case CODEC_JPEG:
return gen8_mfc_context_init(ctx, encoder_context);
diff --git a/src/gen9_vme.c b/src/gen9_vme.c
index 11602a8c..f9065fa4 100644
--- a/src/gen9_vme.c
+++ b/src/gen9_vme.c
@@ -1976,6 +1976,8 @@ gen9_vme_context_destroy(void *context)
free(vme_context);
}
+extern Bool i965_encoder_vp8_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context);
+
Bool gen9_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
{
struct i965_driver_data *i965 = i965_driver_data(ctx);
@@ -1991,6 +1993,8 @@ Bool gen9_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *e
return True;
} else if (encoder_context->codec == CODEC_VP9) {
return gen9_vp9_vme_context_init(ctx, encoder_context);
+ } else if (encoder_context->codec == CODEC_VP8) {
+ return i965_encoder_vp8_vme_context_init(ctx, encoder_context);
}
vme_context = calloc(1, sizeof(struct gen6_vme_context));
diff --git a/src/i965_encoder_vp8.c b/src/i965_encoder_vp8.c
index b1602225..e78b6fce 100644
--- a/src/i965_encoder_vp8.c
+++ b/src/i965_encoder_vp8.c
@@ -5745,6 +5745,9 @@ i965_encoder_vp8_vme_kernels_context_init(VADriverContextP ctx,
extern Bool
gen8_encoder_vp8_context_init(VADriverContextP, struct intel_encoder_context *, struct i965_encoder_vp8_context *);
+extern Bool
+gen9_encoder_vp8_context_init(VADriverContextP, struct intel_encoder_context *, struct i965_encoder_vp8_context *);
+
Bool
i965_encoder_vp8_vme_context_init(VADriverContextP ctx, struct intel_encoder_context *encoder_context)
{
@@ -5760,7 +5763,9 @@ i965_encoder_vp8_vme_context_init(VADriverContextP ctx, struct intel_encoder_con
if (IS_CHERRYVIEW(i965->intel.device_info))
gen8_encoder_vp8_context_init(ctx, encoder_context, vp8_context);
- else {
+ else if (IS_GEN9(i965->intel.device_info)) {
+ gen9_encoder_vp8_context_init(ctx, encoder_context, vp8_context);
+ } else {
free(vp8_context);
return False;
--
2.11.0
More information about the Libva
mailing list