[Libva] [LIBVA-INTEL-DRIVER PATCH 1/5] H264 Encoding:Free aux_batchbuffer to configure access domain correctly for PAK_OBJ command buffer

[Zhao Yakui]

The access domain is not configured correctly for PAK_OBJ command buffer.
And it causes that the buffer content is not synchronized correctly.

At the same time the 64-byte is aligned for the boundary between
CPU and GPU access instead of 16-byte.

Signed-off-by: Zhao Yakui <yakui.zhao at intel.com>
---
 src/gen8_mfc.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/src/gen8_mfc.c b/src/gen8_mfc.c
index 8e68c7c..7efe66e 100644
--- a/src/gen8_mfc.c
+++ b/src/gen8_mfc.c
@@ -1562,7 +1562,7 @@ gen8_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
 
     intel_avc_slice_insert_packed_data(ctx, encode_state, encoder_context, slice_index, slice_batch);
 
-    intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword */
+    intel_batchbuffer_align(slice_batch, 64); /* aligned by an Cache-line */
     head_offset = intel_batchbuffer_used_size(slice_batch);
 
     slice_batch->ptr += pSliceParameter->num_macroblocks * AVC_PAK_LEN_IN_BYTE;
@@ -1576,7 +1576,7 @@ gen8_mfc_avc_batchbuffer_slice(VADriverContextP ctx,
 
 
     /* Aligned for tail */
-    intel_batchbuffer_align(slice_batch, 16); /* aligned by an Oword */
+    intel_batchbuffer_align(slice_batch, 64); /* aligned by Cache-line */
     if (last_slice) {    
         mfc_context->insert_object(ctx,
                                    encoder_context,
@@ -1637,6 +1637,9 @@ gen8_mfc_avc_batchbuffer_pipeline(VADriverContextP ctx,
         OUT_BATCH(batch, CMD_MEDIA_STATE_FLUSH);
         OUT_BATCH(batch, 0);
         ADVANCE_BATCH(batch);
+
+        intel_batchbuffer_free(slice_batch);
+        mfc_context->aux_batchbuffer = NULL;
     }
 
     intel_batchbuffer_end_atomic(batch);
-- 
1.9.1