[Mesa-announce] Mesa 17.1.4 release candidate

Andres Gomez agomez at igalia.com
Wed Jun 28 17:47:35 UTC 2017

Hello list,

The candidate for the Mesa 17.1.4 is now available. Currently we have:
 - 54 queued
 - 0 nominated (outstanding)
 - and 2 rejected patch(es)

In the current queue we have:

In Mesa Core we include some fixes that involve flushing vertices
before some state changes.

The state tracker also received a fix for the Scissor with multiple

The SPIR-V compiler has gotten a work around to prevent a shader bug in

i965 has gotten many patches, including a couple of fixes for having
proper color interpolation in gen3, a bunch of corrections to avoid
hangings on Haswell, specially with fast-clear operations that happen
at the start of a batch, an initialization of the step rate for
interleaved vertex buffers to avoid rendering errors, a correction to
set the depth offset when there is only stencil attachment, a fix for
incorrect renderings due to using anisotropic filtering in nearest
mode, a fix for gl_Fragcoord's interpolation, a fix for Broxton 2x6 l3
config, a correction in Sky Lake for getting in-range clear colors, and
an improvement in gen7+ has been added to comply with OpenGL 4.1+.

anv has gotten a fix for L3 cache programming on Bay Trail.

Gallivm has seen a fix to avoid a segfault when we get invalid
glDrawRangeElements, a recursion that might have impacted performance
has been broken and, in the VA library, another fix has been added to
avoid memory corruptions.

The etnaviv driver has gotten a handful of patches, including fixes for
some resource copy issues, to prevent some fallout from the RB swapped
rendertarget work, to correct the max LOD bias, and a performance
regression has also been fixed.

The AMD drivers have received a fix for the proper generation of the
sid tables. radeonsi has gotten several improvements, including a new
polaris12 pci id and a deadlock fix while r600 is receiving a fix to
upload PBO textures to compressed textures.

The svga driver has received some patches to invalidate surfaces
correctly and a fix to properly unbind the GS.

nouveau's codegen has seen some improvements, including a fix to
properly fold constants in SPLIT operation.

EGL has gotten a couple of fixes to make the platform detection thread-
safe. The DRI2 drivers include now a fix to properly count configs. In
the case of the Android driver, we also got a workaround for apps which
choose their EGLConfig incorrectly and, in the case of the X11 one, a
crash fix has also been included.

>From build and integration point of view, we have added a fix to solve
a linking problem for systems that lack libpthread.so, we have fixed a
recent build problem with Android and we have included also a missing
header for EGL, GLES and VG headers that was not included when EGL
building was disabled.

Take a look at section "Mesa stable queue" for more information.

Testing reports/general approval

Any testing reports (or general approval of the state of the branch)
will be greatly appreciated.

The plan is to have 17.1.4 this Friday (30th of June), around or
shortly after 18:00 GMT.

If you have any questions or suggestions - be that about the current
patch queue or otherwise, please go ahead.

Trivial merge conflicts
commit 4379c53b9b6b7a272ab852c908b723cca24d4ca8
Author: Jason Ekstrand <jason.ekstrand at intel.com>

    i965: Take a uint64_t immediate in emit_pipe_control_write
    (cherry picked from commit a8ea68bc930f212dddf78a4e2073bcbd698b9140)

commit 4cd15cf137a640a59b7ff8a7208d98306d91dbdf
Author: Anuj Phogat <anu
j.phogat at gmail.com>

    i965: Fix broxton 2x6 l3 config
    (cherry picked from commit 8521559e086a3d56f549962ab8e9f45a6a5989d8)

commit 695493671af0efaabf039147e19367de926e5d67
Author: Brian Paul <brianp at vmware.com>

    gallium/vbuf: avoid segfault when we get invalid glDrawRangeElements()
    (cherry picked from commit

commit 863756e6856a0fc3d9b973d5adf995943f736414
Author: Jason Ekstrand <jason.ekstrand at intel.com>

    i965: Clamp clear colors to the representable range
    (cherry picked from commit f1fa4be871e13c68b50685aaf64dc095b49ed0b5)


Mesa stable queue

Nominated (0)

Queued (54)

Alex Deucher (1):
      radeonsi: add new polaris12 pci id

Andres Gomez (2):
      cherry-ignore: 17.1.4 rejected commits
      cherry-ignore: bin/get-fixes-pick-list.sh: better identify multiple "fixes:" tags

Anuj Phogat (2):
      i965: Add and initialize l3_banks field for gen7+
      i965: Fix broxton 2x6 l3 config

Ben Crocker (1):
      egl_dri2: swrastGetDrawableInfo: set *x, *y [v2]

Brian Paul (2):
      svga: check return value from svga_set_shader( SVGA3D_SHADERTYPE_GS, NULL)
      gallium/vbuf: avoid segfault when we get invalid glDrawRangeElements()

Chad Versace (1):
      egl/android: Change order of EGLConfig generation (v2)

Chandu Babu N (1):
      change va max_entrypoints

Charmaine Lee (1):
      svga: use the winsys interface to invalidate surface

Emil Velikov (3):
      docs: add sha256 checksums for 17.1.3
      configure.ac: add -pthread to PTHREAD_LIBS
      radeonsi: include ac_binary.h for struct ac_shader_binary

Eric Engestrom (3):
      egl: properly count configs
      egl/display: only detect the platform once
      egl/display: make platform detection thread-safe

Eric Le Bihan (1):
      Fix khrplatform.h not installed if EGL is disabled.

Iago Toral Quiroga (1):
      i965: update MaxTextureRectSize to match PRMs and comply with OpenGL 4.1+

Ilia Mirkin (2):
      nv50/ir: fetch indirect sources BEFORE the op that uses them
      nv50/ir: fix combineLd/St to update existing records as necessary

Jason Ekstrand (10):
      i965: Flush around state base address
      i965: Take a uint64_t immediate in emit_pipe_control_write
      i965: Unify the two emit_pipe_control functions
      i965: Do an end-of-pipe sync prior to STATE_BASE_ADDRESS
      i965/blorp: Do an end-of-pipe sync around CCS ops
      i965: Do an end-of-pipe sync after flushes
      i965: Disable the interleaved vertex optimization when instancing
      i965: Set step_rate = 0 for interleaved vertex buffers
      spirv: Work around the Doom shader bug
      i965: Clamp clear colors to the representable range

Jonas Kulla (1):
      anv: Fix L3 cache programming on Bay Trail

Kenneth Graunke (1):
      i965: Ignore anisotropic filtering in nearest mode.

Lucas Stach (7):
      etnaviv: don't try RS blit if blit region is unaligned
      etnaviv: use padded width/height for resource copies
      etnaviv: remove bogus assert
      etnaviv: replace translate_clear_color with util_pack_color
      etnaviv: mask correct channel for RB swapped rendertargets
      etnaviv: advertise correct max LOD bias
      etnaviv: only flush resource to self if no scanout buffer exists

Marek Olšák (4):
      winsys/amdgpu: fix a deadlock when waiting for submission_in_progress
      mesa: flush vertices before changing viewports
      mesa: flush vertices before updating ctx->_Shader
      st/mesa: fix pipe_rasterizer_state::scissor with multiple viewports

Michel Dänzer (1):
      gallium/util: Break recursion in pipe_resource_reference

Nicolai Hähnle (2):
      gallium/radeon/gfx9: fix PBO texture uploads to compressed textures
      amd/common: fix off-by-one in sid_tables.py

Pierre Moreau (1):
      nv50/ir: Properly fold constants in SPLIT operation

Rob Herring (1):
      Android: major/minor/makedev live in <sys/sysmacros.h>

Topi Pohjolainen (2):
      i965: Add an end-of-pipe sync helper
      i965/gen4: Set depth offset when there is stencil attachment only

Ville Syrjälä (3):
      i915: Fix wpos_tex vs. -1 comparison
      i915: Fix gl_Fragcoord interpolation
      i915: Always emit W on gen3

Rejected (2)

Nicolai Hähnle (1):
      st/glsl_to_tgsi: use correct writemask when converting generic intrinsics

This commit addressed an earlier commit 944455217b which did not land
in branch.

Ilia Mirkin (1):
      nv50,nvc0: remove IDX from bufctx immediately, to avoid conflicts with clear

This commit depends on 330d0607e and 61d8f3387d, neither of which is in

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