[Mesa-announce] [ANNOUNCE] mesa 17.0.2
Emil Velikov
emil.l.velikov at gmail.com
Mon Mar 20 14:20:42 UTC 2017
Mesa 17.0.2 is now available.
In this release we have:
One dozen fixes in each of the Vulkan drivers - ANV and RADV. Misc.
Improvements in the i965, nouveau (nvc0) and radeons drivers.
To top it up we have a build fix for the clover (OpenCL) state-tracker.
Alex Smith (3):
radv: Emit pending flushes before executing a secondary command buffer
radv: Flush before copying with PKT3_WRITE_DATA in CmdUpdateBuffer
radv/ac: Fix shared memory offset calculation
Bas Nieuwenhuizen (3):
radv: Disable HTILE for textures with multiple layers/levels.
radv: Emit cache flushes before CP DMA.
Revert "radv: Emit cache flushes before CP DMA."
Dave Airlie (3):
radv: drop Z24 support.
radv: disable mip point pre clamping.
radv: setup llvm target data layout
Emil Velikov (5):
docs: add sha256 checksums for 17.0.1
cherry-ignore: add the swizzle blorp_clear fix
i965: move brw_define.h ifndef guard to the top
Update version to 17.0.2
docs: add release notes for 17.0.2
Fredrik Höglund (2):
radv: fix the dynamic buffer index in vkCmdBindDescriptorSets
radv/ac: fix multiple descriptor sets with dynamic buffers
Gregory Hainaut (1):
glapi: fix typo in count_scale
Ilia Mirkin (2):
nvc0: take extra pushbuf space into account for pushbuf_space calls
nvc0: increase alignment to 256 for texture buffers on fermi
Jacob Lifshay (1):
vulkan/wsi: Improve the DRI3 error message
James Legg (1):
radv: Fix using more than 4 bound descriptor sets
Jason Ekstrand (7):
anv/blorp/clear_subpass: Only set surface clear color for fast clears
anv: Accurately advertise dynamic descriptor limits
anv: Stall before fast-clear operations
anv: Properly handle destroying NULL devices and instances
anv/blorp: Turn off AUX after doing a CCS_D resolve
anv/blorp: Only set a clear color for resolves if fast-cleared
nir/intrinsics: Make load_barycentric_input take a 2-component coor
Jonas Pfeil (1):
ralloc: Make sure ralloc() allocations match malloc()'s alignment.
Kenneth Graunke (1):
egl: Ensure ResetNotificationStrategy matches for shared contexts.
Marek Olšák (3):
st/mesa: reset sample_mask, min_sample, and render_condition for PBO ops
st/mesa: set blend state for PBO readbacks
radeonsi: mark all bound shader buffer ranges as initialized
Matt Turner (1):
clover: Work around build failure with AltiVec.
Nanley Chery (2):
anv/pass: Avoid accessing attachment array out of bounds
anv/image: Remove extra dependency on HiZ-specific variable
Nicolai Hähnle (2):
st/glsl_to_tgsi: avoid iterating past the head of the instruction list
st/mesa: inform the driver of framebuffer changes before compute
dispatches
Robert Foss (1):
mesa: Avoid read of uninitialized variable
Samuel Iglesias Gonsálvez (5):
i965/fs: mark last DF uniform array element as 64 bit live one
i965/fs: detect different bit size accesses to uniforms to push
them in proper locations
i965/fs: fix indirect load DF uniforms on BSW/BXT
i965/fs: fix source type when emitting MOV_INDIRECT to read ICP handles
i965/fs: emit MOV_INDIRECT with the source with the right register type
Samuel Pitoiset (1):
radeonsi: disable sinking common instructions down to the end block
git tag: mesa-17.0.2
https://mesa.freedesktop.org/archive/mesa-17.0.2.tar.gz
MD5: 1e271caca06e5b5811e876f45914c2e5 mesa-17.0.2.tar.gz
SHA1: 0f9762b7ef825d8baa9a021566ad9e136cdf7cfa mesa-17.0.2.tar.gz
SHA256: 2e0f41e7974ba7a36ca32bbeaf8ebcd65c8fd4d2dc9872f04d4becbd5e7a8cb5
mesa-17.0.2.tar.gz
PGP: https://mesa.freedesktop.org/archive/mesa-17.0.2.tar.gz.sig
https://mesa.freedesktop.org/archive/mesa-17.0.2.tar.xz
MD5: 8f808e92b893d412fbd6510e1d16f5c5 mesa-17.0.2.tar.xz
SHA1: efbba51e7f8cd13ba93984e98bae9d8822c20e70 mesa-17.0.2.tar.xz
SHA256: f8f191f909e01e65de38d5bdea5fb057f21649a3aed20948be02348e77a689d4
mesa-17.0.2.tar.xz
PGP: https://mesa.freedesktop.org/archive/mesa-17.0.2.tar.xz.sig
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