[Mesa-announce] [ANNOUNCE] mesa 19.0.4

Thu May 9 20:55:58 UTC 2019

Hi list,

Sorry I'm running a bit behind with this release, I was sick on Monday and had
to patch up some autotools problems in the mean time.

It's been a pretty active release, esepcially for how late in the cyle we are.
Radv was the busiest componenet, but there were also a few changes for intel,
radeonsi, some core vulkan work, and a little bit of other stuff here and there.

Hopefully things will start slowing down again.

Just a reminder that there are only two more planned 19.0.x releases, but we may
add more if 19.1 slips.

Dylan

shortlog:

Alejandro Piñeiro (1):
      docs: document MESA_GLSL=errors keyword

Andrii Simiklit (1):
      egl: return correct error code for a case req ver < 3 with forward-compatible

Axel Davy (1):
      st/nine: Fix D3DWindowBuffer_release for old wine nine support

Bas Nieuwenhuizen (1):
      radv: Disable VK_EXT_descriptor_indexing.

Brian Paul (1):
      svga: add SVGA_NO_LOGGING env var (v2)

Caio Marcelo de Oliveira Filho (1):
      spirv: Handle SpvOpDecorateId

Charmaine Lee (1):
      svga: move host logging to winsys

Chuck Atkins (1):
      meson: Fix missing glproto dependency for gallium-glx

Daniel Stone (1):
      vulkan/wsi/wayland: Respect non-blocking AcquireNextImage

Dave Airlie (2):
      r600: reset tex array override even when no view bound
      util/bitset: fix bitset range mask calculations.

Dylan Baker (8):
      docs: Add SHA256 sums for mesa 19.0.3
      cherry-ignore: Add a patch that was manually backported
      cherry-ignore: Add more backported patches
      cherry-ignore: Add another patch
      cherry-ignore: Add more patches
      meson: Force the use of config-tool for llvm
      VERSION: bump for 19.0.4 release
      Docs: add 19.0.4 release notes

Emil Velikov (3):
      vulkan/wsi: check if the display_fd given is master
      vulkan/wsi: don't use DUMB_CLOSE for normal GEM handles
      configure.ac: check for libdrm when using VL with X11

Erik Faye-Lund (2):
      softpipe: setup pixel_offset for all primitive types
      draw: flush when setting stream-out targets

Francisco Jerez (2):
      intel/fs: Lower integer multiply correctly when destination stride equals 4.
      intel/fs: Cap dst-aligned region stride to maximum representable hstride value.

Hal Gentz (1):
      glx: Fix synthetic error generation in __glXSendError

Ian Romanick (2):
      glsl: Silence may unused parameter warnings in glsl/ir.h
      mesa: Add missing display list support for GL_FOG_COORDINATE_SOURCE

Jason Ekstrand (1):
      anv/descriptor_set: Destroy sets before pool finalization

Jon Turney (1):
      meson: Force '.so' extension for DRI drivers

Juan A. Suarez Romero (2):
      spirv: add missing SPV_EXT_descriptor_indexing capabilities
      radv: enable descriptor indexing capabilities

Kenneth Graunke (6):
      glsl: Allow gl_nir_lower_samplers*() without a gl_shader_program
      glsl: Don't look at sampler uniform storage for internal vars
      i965: Ignore uniform storage for samplers or images, use binding info
      i965: Fix BRW_MEMZONE_LOW_4G heap size.
      i965: Force VMA alignment to be a multiple of the page size.
      i965: leave the top 4Gb of the high heap VMA unused

Lionel Landwerlin (4):
      anv: store heap address bounds when initializing physical device
      anv: leave the top 4Gb of the high heap VMA unused
      anv: fix argument name for vkCmdEndQuery
      anv: rework queries writes to ensure ordering memory writes

Marek Olšák (2):
      radeonsi/gfx9: set that window_rectangles always roll the context
      radeonsi/gfx9: rework the gfx9 scissor bug workaround (v2)

Nicolai Hähnle (1):
      radeonsi: add si_debug_options for convenient adding/removing of options

Rhys Perry (1):
      radv: fix set_output_usage_mask() with composite and 64-bit types

Ross Burton (1):
      Revert "meson: drop GLESv1 .so version back to 1.0.0"

Samuel Pitoiset (8):
      radv: add missing VEGA20 chip in radv_get_device_name()
      radv: do not need to force emit the TCS regs on Vega20
      radv: fix color conversions for normalized uint/sint formats
      radv: implement a workaround for VK_EXT_conditional_rendering
      radv: set WD_SWITCH_ON_EOP=1 when drawing primitives from a stream output buffer
      radv: only need to force emit the TCS regs on Vega10 and Raven1
      radv: apply the indexing workaround for atomic buffer operations on GFX9
      radv: fix setting the number of rectangles when it's dyanmic

Tapani Pälli (1):
      anv: expose VK_EXT_queue_family_foreign on Android

Timothy Arceri (4):
      nir: fix nir_remove_unused_varyings()
      util/drirc: add workarounds for bugs in Doom 3: BFG
      radeonsi: add config entry for Counter-Strike Global Offensive
      Revert "glx: Fix synthetic error generation in __glXSendError"

git tag: mesa-19.0.4

https://mesa.freedesktop.org/archive/mesa-19.0.4.tar.gz
MD5:  6f9284c060d28c67451fd652c6fa5d14  mesa-19.0.4.tar.gz
SHA1: 139641aa991014e0141b0800c5dec94402655322  mesa-19.0.4.tar.gz
SHA256: de361c76bf7aae09219f571b9ae77a34864a1cd9f6ba24c845b18b3cd5e4b9a2  mesa-19.0.4.tar.gz
SHA512: 94f1e93e5bfd627516be6c43959f8dceb9fe120769358a62c0391f68ac6db4cf7435d75e03c952e81355db343c0c30b580296ff0e347723e4f5e56404e1edf94  mesa-19.0.4.tar.gz
PGP:  https://mesa.freedesktop.org/archive/mesa-19.0.4.tar.gz.sig

https://mesa.freedesktop.org/archive/mesa-19.0.4.tar.xz
MD5:  edd3055e863a44c4850f0db0d1412992  mesa-19.0.4.tar.xz
SHA1: 29347241452d4adebf04c60577b47d9cee80ed76  mesa-19.0.4.tar.xz
SHA256: 39f9f32f448d77388ef817c6098d50eb0c1595815ce7e895dec09dd68774ce47  mesa-19.0.4.tar.xz
SHA512: 431cd9360e1f6376e0966daf82322877b3833032c800f2d86816b37a6f3978d76294a01c3905a01af610582c9541c2a8b52b2e89c56cc954651aa7a790e84ca5  mesa-19.0.4.tar.xz
PGP:  https://mesa.freedesktop.org/archive/mesa-19.0.4.tar.xz.sig

-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 228 bytes
Desc: signature
URL: <https://lists.freedesktop.org/archives/mesa-announce/attachments/20190509/0c8e268d/attachment.sig>