mesa: Branch 'master' - 2 commits

Haihao Xiang haihao at kemper.freedesktop.org
Wed Jan 17 03:00:01 UTC 2007


 progs/demos/texdown.c                   |    8 ++++----
 src/mesa/drivers/dri/i965/brw_gs.c      |    5 ++++-
 src/mesa/drivers/dri/i965/brw_gs.h      |    1 +
 src/mesa/drivers/dri/i965/brw_gs_emit.c |   10 ++++++++++
 4 files changed, 19 insertions(+), 5 deletions(-)

New commits:
diff-tree 747c9129c0b592941b14c290ff3d8ab22ad66acb (from afba8f0d30974bf7fbb9533f23eb2f92d49ac526)
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Wed Jan 17 10:39:50 2007 +0800

    I965: fix bug#9625-get the correct PV for quardstrip
    
    The order of vertices in payload for quardstrip is (0, 1, 3, 2),
    so the PV for quardstrip is c->reg.vertex[2].

diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index 9066e42..73263a5 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -82,6 +82,9 @@ static void compile_gs_prog( struct brw_
    case GL_QUADS:
       brw_gs_quads( &c ); 
       break;
+   case GL_QUAD_STRIP:
+      brw_gs_quad_strip( &c );
+      break;
    case GL_LINE_LOOP:
       brw_gs_lines( &c );
       break;
@@ -145,7 +148,7 @@ static const GLenum gs_prim[GL_POLYGON+1
    GL_TRIANGLES,
    GL_TRIANGLES,
    GL_QUADS,
-   GL_QUADS,
+   GL_QUAD_STRIP,
    GL_TRIANGLES
 };
 
diff --git a/src/mesa/drivers/dri/i965/brw_gs.h b/src/mesa/drivers/dri/i965/brw_gs.h
index f9aa71d..29a4e80 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.h
+++ b/src/mesa/drivers/dri/i965/brw_gs.h
@@ -67,6 +67,7 @@ struct brw_gs_compile {
 #define ATTR_SIZE  (4*4)
 
 void brw_gs_quads( struct brw_gs_compile *c );
+void brw_gs_quad_strip( struct brw_gs_compile *c );
 void brw_gs_tris( struct brw_gs_compile *c );
 void brw_gs_lines( struct brw_gs_compile *c );
 void brw_gs_points( struct brw_gs_compile *c );
diff --git a/src/mesa/drivers/dri/i965/brw_gs_emit.c b/src/mesa/drivers/dri/i965/brw_gs_emit.c
index e4eed36..9abb94d 100644
--- a/src/mesa/drivers/dri/i965/brw_gs_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_gs_emit.c
@@ -116,6 +116,16 @@ void brw_gs_quads( struct brw_gs_compile
    brw_gs_emit_vue(c, c->reg.vertex[2], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
 }
 
+void brw_gs_quad_strip( struct brw_gs_compile *c )
+{
+   brw_gs_alloc_regs(c, 4);
+   
+   brw_gs_emit_vue(c, c->reg.vertex[2], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
+   brw_gs_emit_vue(c, c->reg.vertex[3], 0, (_3DPRIM_POLYGON << 2));
+   brw_gs_emit_vue(c, c->reg.vertex[0], 0, (_3DPRIM_POLYGON << 2)); 
+   brw_gs_emit_vue(c, c->reg.vertex[1], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
+}
+
 void brw_gs_tris( struct brw_gs_compile *c )
 {
    brw_gs_alloc_regs(c, 3);
diff-tree afba8f0d30974bf7fbb9533f23eb2f92d49ac526 (from 7c8f311e406a4502982fd03e09d61f6269e0e82c)
Author: Xiang, Haihao <haihao.xiang at intel.com>
Date:   Wed Jan 17 10:17:10 2007 +0800

     Fix bug#9673
    
     Cast from pointer to unsinged long and cast to pointer from
     unsinged long

diff --git a/progs/demos/texdown.c b/progs/demos/texdown.c
index fc98fdd..5fecd9a 100644
--- a/progs/demos/texdown.c
+++ b/progs/demos/texdown.c
@@ -149,7 +149,7 @@ TypeStr(GLenum type)
  */
 #define ALIGN (1<<12)
 
-static unsigned align(unsigned value, unsigned a)
+static unsigned long align(unsigned long value, unsigned long a)
 {
    return (value + a - 1) & ~(a-1);
 }
@@ -186,10 +186,10 @@ MeasureDownloadRate(void)
 
    printf("alloc %p %p\n", orig_texImage, orig_getImage);
 
-   texImage = (GLubyte *)align((unsigned)orig_texImage, ALIGN);
-   getImage = (GLubyte *)align((unsigned)orig_getImage, ALIGN);   
+   texImage = (GLubyte *)align((unsigned long)orig_texImage, ALIGN);
+   getImage = (GLubyte *)align((unsigned long)orig_getImage, ALIGN);   
 
-   for (i = 1; !(((unsigned)texImage) & i); i<<=1)
+   for (i = 1; !(((unsigned long)texImage) & i); i<<=1)
       ;
    printf("texture image alignment: %d bytes (%p)\n", i, texImage);
       



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