mesa: Branch 'master' - 2 commits

[Nan hai Zou]

 src/mesa/drivers/dri/i965/intel_context.c |    6 +++---
 src/mesa/drivers/dri/i965/intel_context.h |    2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)

New commits:
diff-tree c6c65e7b22f8b64efa45887b7808260248a5f384 (from parents)
Merge: 6aa62ba43f64f617c608e52b63c7eaa7aae16fb4 d5db167c2cf9243c3153efb29582df72d819e7ac
Author: Zou Nan hai <nanhai.zou at intel.com>
Date:   Fri Jan 26 07:05:02 2007 +0800

    Merge branch 'master' of git+ssh://znh@git.freedesktop.org/git/mesa/mesa

diff-tree 6aa62ba43f64f617c608e52b63c7eaa7aae16fb4 (from 844e5610de6ffe6966072d120b50db541ea85104)
Author: Zou Nan hai <nanhai.zou at intel.com>
Date:   Fri Jan 26 07:04:15 2007 +0800

    ARB_Occlusion_query should support multiple query at same time

diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c
index f7ab7d3..3f8c2c0 100644
--- a/src/mesa/drivers/dri/i965/intel_context.c
+++ b/src/mesa/drivers/dri/i965/intel_context.c
@@ -258,11 +258,11 @@ intelBeginQuery(GLcontext *ctx, GLenum t
 {
 	struct intel_context *intel = intel_context( ctx );
 	drmI830MMIO io = {
-		.read_write = MMIO_WRITE,
+		.read_write = MMIO_READ,
 		.reg = MMIO_REGS_PS_DEPTH_COUNT,
 		.data = &q->Result 
 	};
-	intel->stats_wm = GL_TRUE;
+	intel->stats_wm++;
 	intelFinish(&intel->ctx);
 	drmCommandRead(intel->driFd, DRM_I830_MMIO, &io, sizeof(io));
 }
@@ -281,7 +281,7 @@ intelEndQuery(GLcontext *ctx, GLenum tar
 	drmCommandRead(intel->driFd, DRM_I830_MMIO, &io, sizeof(io));
 	q->Result = tmp - q->Result;
 	q->Ready = GL_TRUE;
-	intel->stats_wm = GL_FALSE;
+	intel->stats_wm--;
 }
 
 
diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h
index d51536c..a0f392f 100644
--- a/src/mesa/drivers/dri/i965/intel_context.h
+++ b/src/mesa/drivers/dri/i965/intel_context.h
@@ -177,7 +177,7 @@ struct intel_context
    GLuint second_last_swap_fence;
    
    GLboolean aub_wrap;
-   GLboolean stats_wm;
+   GLuint stats_wm;
 
    struct intel_batchbuffer *batch;