mesa: Changes to 'gallium-0.1'

Ian Romanick idr at kemper.freedesktop.org
Thu Feb 21 10:44:05 PST 2008


 src/gallium/drivers/cell/common.h               |   14 ++-
 src/gallium/drivers/cell/ppu/cell_draw_arrays.c |    6 +
 src/gallium/drivers/cell/ppu/cell_flush.c       |   14 +++
 src/gallium/drivers/cell/spu/Makefile           |    1 
 src/gallium/drivers/cell/spu/spu_dcache.c       |  111 ++++++++++++++++++++++++
 src/gallium/drivers/cell/spu/spu_dcache.h       |   34 +++++++
 src/gallium/drivers/cell/spu/spu_exec.c         |   48 ++++------
 src/gallium/drivers/cell/spu/spu_main.c         |    8 +
 src/gallium/drivers/cell/spu/spu_vertex_fetch.c |   70 ---------------
 9 files changed, 208 insertions(+), 98 deletions(-)

commit diffs at http://gitweb.freedesktop.org/?p=mesa/mesa.git;a=summary

New commits:
commit de5c64e0af0b1a1ce3ee12f361341880dc260868
Author: Ian Romanick <idr at us.ibm.com>
Date:   Thu Feb 21 10:32:02 2008 -0800

    Cell: Remove erroneous ALIGN16_ATTRIB attributes
    
    If a structure is marked as being aligned the SPE compiler performs
    extra optimizations (sadly, only -O2 is used) when reading the
    structure.  Since most of the structures sent in batch buffers are
    only 8-byte aligned, this resulted in mysterous bugs with -O2.

commit 6dd47c264a8642a4e3dbe0b4fc194174743c64fc
Author: Ian Romanick <idr at us.ibm.com>
Date:   Thu Feb 21 10:24:29 2008 -0800

    Cell: Add spu_dcache.c to Makefile.
    
    This was erroneously missing in previous commits.

commit e78fc9f2f4d89b0cae0d56d84dd16cb76a6757dc
Author: Ian Romanick <idr at us.ibm.com>
Date:   Thu Feb 21 09:03:29 2008 -0800

    Cell: Initial scalar implementation of spu_dcache_mark_dirty

commit 2d1f086c12b6d64f5c3fb80474f26775aeb71370
Author: Ian Romanick <idr at us.ibm.com>
Date:   Wed Feb 20 14:45:08 2008 -0800

    Cell: Fix off-by-one error in spu_dcache_fetch_unaligned
    
    An off-by-one error caused an extra qword to be fetched under certain
    alignment / size combinations.

commit 7c74037852a484a8a50e8bc540b954a624de4d33
Author: Ian Romanick <idr at us.ibm.com>
Date:   Wed Feb 20 14:32:25 2008 -0800

    Cell: Initial pass at unified data cache



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